From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF5DFC76196 for ; Fri, 31 Mar 2023 09:32:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232087AbjCaJce (ORCPT ); Fri, 31 Mar 2023 05:32:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232171AbjCaJcR (ORCPT ); Fri, 31 Mar 2023 05:32:17 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 40C451DFB2; Fri, 31 Mar 2023 02:31:57 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32V9Vd2Z118700; Fri, 31 Mar 2023 04:31:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680255099; bh=NWGs675xJqn+EBIRqR798bQ2TMAKWFKOqddqigq3BxI=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=Tmrz2kf9DDYyD08wCA3MZdj5hE4sjijAiSim663593pXHPoRvB0mgxisXRb+1H29b Q81SpLtu18V6h5hGZl2PGm4xJfi/C3hK3T6h/Jej39LVQiJgXS74bzNcBHUUmuPyXy i6MCCBGOaq0Kpa/XqzhsZrEqneaxSa2B1k/5DYzo= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32V9VdcY054608 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 31 Mar 2023 04:31:39 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 31 Mar 2023 04:31:39 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 31 Mar 2023 04:31:39 -0500 Received: from [10.249.48.175] (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32V9Vd1C021219; Fri, 31 Mar 2023 04:31:39 -0500 Message-ID: <28d0ce4d-afca-55ee-b471-fe02e71ab262@ti.com> Date: Fri, 31 Mar 2023 04:31:39 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH v2 0/2] Add R5F and C71 DSP nodes for J784S4 SoC To: Nishanth Menon CC: , , , , , , References: <20230330141536.22480-1-hnagalla@ti.com> <20230330145518.icy53f4jdmqqonzt@shrink> Content-Language: en-US From: Hari Nagalla In-Reply-To: <20230330145518.icy53f4jdmqqonzt@shrink> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 3/30/23 09:55, Nishanth Menon wrote: >> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 168 ++++++++++++++++++ >> .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 40 +++++ >> 2 files changed, 208 insertions(+) >> >> -- >> 2.17.1 >> > No specific need for board file memory reservations for DDR? They are needed in board file, but to be submitted in separate patch set.