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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id s7-20020a19ad47000000b004abc977ad7fsm2225842lfd.294.2022.11.15.06.56.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 15 Nov 2022 06:57:00 -0800 (PST) Message-ID: <28ddcec9-095f-f2e7-48ab-e05aab04963a@linaro.org> Date: Tue, 15 Nov 2022 15:56:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH 02/14] dt-bindings: phy: qcom,qmp-usb3-dp: fix sc8280xp bindings Content-Language: en-US To: Johan Hovold Cc: Johan Hovold , Vinod Koul , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <02725b78-04ad-8f4a-25c2-9cdaa1e37ab7@linaro.org> <8420c342-9dce-aea7-8d1e-f141e0c1ebb5@linaro.org> <61df3c4f-f41c-9525-606d-1b8261163080@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 15/11/2022 15:22, Johan Hovold wrote: > On Tue, Nov 15, 2022 at 09:12:54AM +0100, Krzysztof Kozlowski wrote: >> On 14/11/2022 18:08, Johan Hovold wrote: >>>> >>>> Which is also fine. I don't understand still why it is a problem - even >>>> if you have multiple files, one for each SoC/phy. If USB4 brings here 10 >>>> more clocks and other SoCs/phys might bring many more options, then what >>>> else can you do? Grow the binding file with big text-based mapping of >>>> IDs? It's not a viable solution. Header or headers is the only >>>> maintainable way for such cases. >>> >>> So then we must add per-SoC (and PHY type) headers even if we can >>> possibly reuse defines from one platform for another as long as they >>> appear to be similar enough? >> >> No, you don't have to. I just got impression that future devices will >> bring so many changes that anyway you will end up with per-SoC defines. >> >>> For example, using a "SC7180_USB3_DP" infix >>> for the current platforms and add a new series of indexes for SC8280XP: >>> >>> QMP_SC7180_USB3_DP_USB3_PIPE 0 >>> QMP_SC7180_USB3_DP_DP_LINK 1 >>> QMP_SC7180_USB3_DP_DP_VCO_DIV 2 >>> >>> QMP_SC8280XP_USB4_USB3_DP_USB3_PIPE 0 >>> QMP_SC8280XP_USB4_USB3_DP_DP_LINK 1 >>> QMP_SC8280XP_USB4_USB3_DP_DP_VCO_DIV 2 >>> QMP_SC8280XP_USB4_USB3_DP_USB4_PCIE_PIPE 3 >>> ... >>> QMP_SC8280XP_USB4_USB3_DP_USB4_RX1 9 >> >> The names are just a names, you can even use QMP_SC7180_* on SC8280XP. >> You can skip the SoC part and have something shared. We already have >> such patterns - although maybe more often for outside components (like >> PMICs). The differences are: >> 1. For per-SoC name it's quite obvious which clock is supported on fiven >> SoC, >> 2. With shared names, you should document somewhere mapping between >> supported clocks and SoCs. Also what to do if new device comes with 10 >> new clocks entirely different - re-use/map existing defines or add >> completely new set of 10 of them? > > Ok, thanks. I'll go with a common prefix per PHY type for now, and we > can worry about hypothetical hardware revisions later. > > I'll use a "QMP_USB43DP_" prefix for the new SC8280XP binding, which can > be reused also for the older SoCs with USB3-DP PHYs if/when we convert > them as their indexes will be a subset of the SC8280XP ones: > > /* QMP USB4-USB3-DP clocks */ > #define QMP_USB43DP_USB3_PIPE_CLK 0 > #define QMP_USB43DP_DP_LINK_CLK 1 > #define QMP_USB43DP_DP_VCO_DIV_CLK 2 > > Since I'm adding a new header anyway, I decided to go with dedicated > indexes also for the PHY selection (instead of using the PHY_TYPE > defines): > > /* QMP USB4-USB3-DP PHYs */ > #define QMP_USB43DP_USB3_PHY 0 > #define QMP_USB43DP_DP_PHY 1 > > I'll add these to a common dt-bindings/phy/phy-qcom-qmp.h header so that > it can be used also for the UFS clocks (with a "QMP_UFS_" prefix). Sounds good, thanks. Best regards, Krzysztof