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From: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
To: Eric Lin <eric.lin@sifive.com>,
	conor@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com,
	paul.walmsley@sifive.com, aou@eecs.berkeley.edu, maz@kernel.org,
	chenhuacai@kernel.org, baolu.lu@linux.intel.com, will@kernel.org,
	kan.liang@linux.intel.com, nnac123@linux.ibm.com,
	pierre.gondois@arm.com, huangguangbin2@huawei.com,
	jgross@suse.com, chao.gao@intel.com, maobibo@loongson.cn,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, dslin1010@gmail.com
Cc: Greentime Hu <greentime.hu@sifive.com>,
	Zong Li <zong.li@sifive.com>, Nick Hu <nick.hu@sifive.com>
Subject: Re: [PATCH 1/3] soc: sifive: Add SiFive private L2 cache support
Date: Fri, 16 Jun 2023 21:02:09 +0200	[thread overview]
Message-ID: <28f511f2-ffbb-2ef7-c47c-caf9f5164512@wanadoo.fr> (raw)
In-Reply-To: <20230616063210.19063-2-eric.lin@sifive.com>

Le 16/06/2023 à 08:32, Eric Lin a écrit :
> This adds SiFive private L2 cache driver which will show
> cache config information when booting and add cpu hotplug
> callback functions.
> 
> Signed-off-by: Eric Lin <eric.lin-SpMDHPYPyPbQT0dZR+AlfA@public.gmane.org>
> Signed-off-by: Nick Hu <nick.hu-SpMDHPYPyPbQT0dZR+AlfA@public.gmane.org>
> Reviewed-by: Zong Li <zong.li-SpMDHPYPyPbQT0dZR+AlfA@public.gmane.org>

[...]

> +static int __init sifive_pl2_cache_init(void)
> +{
> +	int ret;
> +
> +	ret = cpuhp_setup_state(CPUHP_AP_RISCV_SIFIVE_PL2_ONLINE,
> +				"soc/sifive/pl2:online",
> +				      sifive_pl2_online_cpu,
> +				      sifive_pl2_offline_cpu);
> +	if (ret < 0) {
> +		pr_err("Failed to register CPU hotplug notifier %d\n", ret);
> +		return ret;
> +	}
> +
> +	ret = platform_driver_register(&sifive_pl2_cache_driver);
> +	if (ret) {
> +		pr_err("Failed to register sifive_pl2_cache_driver: %d\n", ret);

Blind guess: does cpuhp_remove_state() needs to be called?

> +		return ret;
> +	}
> +
> +	sifive_pl2_pm_init();
> +
> +	return ret;

If you send a v2, return 0; would be slighly nicer here.

CJ

> +}

[...]


  parent reply	other threads:[~2023-06-16 19:02 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-16  6:32 [PATCH 0/3] Add SiFive Private L2 cache and PMU driver Eric Lin
2023-06-16  6:32 ` [PATCH 1/3] soc: sifive: Add SiFive private L2 cache support Eric Lin
2023-06-16  8:30   ` Ben Dooks
2023-06-23  8:21     ` Eric Lin
2023-06-16 19:02   ` Christophe JAILLET [this message]
2023-06-23  8:28     ` Eric Lin
2023-06-16 21:05   ` Conor Dooley
2023-06-23  9:49     ` Eric Lin
2023-06-16  6:32 ` [PATCH 2/3] soc: sifive: Add SiFive private L2 cache PMU driver Eric Lin
2023-06-16 10:12   ` Conor Dooley
2023-06-20  3:14     ` Eric Lin
2023-06-21 15:17       ` Conor Dooley
2023-06-23 13:24         ` Will Deacon
2023-06-23 16:03           ` Eric Lin
2023-07-11  8:41       ` Ben Dooks
2023-06-16 19:05   ` Christophe JAILLET
2023-06-16  6:32 ` [PATCH 3/3] dt-bindings: riscv: sifive: Add SiFive Private L2 cache controller Eric Lin
2023-06-16 10:10   ` Conor Dooley
2023-06-16 10:37     ` Ben Dooks
2023-06-26  3:06     ` Eric Lin
2023-06-16 10:45   ` Krzysztof Kozlowski
2023-06-26  3:26     ` Eric Lin
2023-06-26  6:19       ` Krzysztof Kozlowski
2023-06-28 16:31         ` Eric Lin
2023-07-01  8:22           ` Krzysztof Kozlowski
2023-07-12 11:09             ` Eric Lin
2023-07-12 12:30               ` Krzysztof Kozlowski
2023-07-12 12:48                 ` Conor Dooley
2023-07-20 10:16                   ` Eric Lin
2023-07-20  9:49                 ` Eric Lin

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