From: Krzysztof Kozlowski <krzk@kernel.org>
To: Sai Krishna Musham <sai.krishna.musham@amd.com>,
bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
mani@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, cassel@kernel.org
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, michal.simek@amd.com,
bharat.kumar.gogada@amd.com, thippeswamy.havalige@amd.com,
pranav.sanwal@amd.com
Subject: Re: [PATCH v2 1/2] dt-bindings: pci: Add CPM6 support to AMD MDB PCIe binding
Date: Wed, 29 Jul 2026 11:54:23 +0200 [thread overview]
Message-ID: <2918ad67-7a78-4e47-824a-15500edeeff1@kernel.org> (raw)
In-Reply-To: <20260728202044.1785986-2-sai.krishna.musham@amd.com>
On 28/07/2026 22:20, Sai Krishna Musham wrote:
> The AMD CPM6 PCIe controller is based on the Synopsys DesignWare PCIe IP.
> Add "intr" to snps,dw-pcie.yaml vendor-specific reg-names for the
> per-controller interrupt register region used by CPM6.
>
> Update amd,versal2-mdb-host.yaml with separate register definitions:
> - MDB5: 4 regions (slcr, config, dbi, atu)
> - CPM6: 5 regions (slcr, config, dbi, atu, intr)
>
> Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
> ---
> Changes in v2:
> - Update the CPM6 device tree binding and example.
>
> v1 https://lore.kernel.org/all/20260402180006.486229-2-sai.krishna.musham@amd.com/
> ---
> .../bindings/pci/amd,versal2-mdb-host.yaml | 111 ++++++++++++++++--
> .../devicetree/bindings/pci/snps,dw-pcie.yaml | 2 +
> 2 files changed, 102 insertions(+), 11 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> index 406c15e1dee1..d22de24b41ca 100644
> --- a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> @@ -12,24 +12,65 @@ maintainers:
> allOf:
> - $ref: /schemas/pci/pci-host-bridge.yaml#
> - $ref: /schemas/pci/snps,dw-pcie.yaml#
> + - if:
Move entire allOf to the end, after required: block.
> + properties:
> + compatible:
> + contains:
> + const: amd,versal2-mdb-host
> + then:
> + properties:
> + reg:
> + items:
> + - description: MDB System Level Control and Status Register (SLCR) Base
> + - description: configuration region
> + - description: data bus interface
> + - description: address translation unit register
> + reg-names:
> + items:
> + - const: slcr
> + - const: config
> + - const: dbi
> + - const: atu
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - amd,versal2-cpm6-host
> + - amd,versal2-cpm6-host1
> + then:
> + properties:
> + reg:
> + minItems: 4
> + items:
> + - description: MDB System Level Control and Status Register (SLCR) Base
> + - description: configuration region
> + - description: data bus interface
> + - description: address translation unit register
> + - description: CPM6 PCIe error and event interrupt registers
> + reg-names:
> + minItems: 4
> + items:
> + - const: slcr
> + - const: config
> + - const: dbi
> + - const: atu
> + - const: intr
>
> properties:
> compatible:
> - const: amd,versal2-mdb-host
> + enum:
> + - amd,versal2-mdb-host
> + - amd,versal2-cpm6-host
> + - amd,versal2-cpm6-host1
>
> reg:
> - items:
> - - description: MDB System Level Control and Status Register (SLCR) Base
> - - description: configuration region
> - - description: data bus interface
> - - description: address translation unit register
> + minItems: 4
> + maxItems: 5
>
> reg-names:
> - items:
> - - const: slcr
> - - const: config
> - - const: dbi
> - - const: atu
Leave the list and extend it.
> + minItems: 4
You need only this.
> + maxItems: 5
>
> ranges:
> maxItems: 2
> @@ -141,3 +182,51 @@ examples:
> };
> };
> };
> +
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/gpio/gpio.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + pcie@fcdd0000 {
> + compatible = "amd,versal2-cpm6-hos
You do not need new example for one new property.
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-07-29 9:54 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-28 20:20 [PATCH v2 0/2] pci: AMD: Add Versal2 CPM6 PCIe host controller support Sai Krishna Musham
2026-07-28 20:20 ` [PATCH v2 1/2] dt-bindings: pci: Add CPM6 support to AMD MDB PCIe binding Sai Krishna Musham
2026-07-28 20:26 ` sashiko-bot
2026-07-28 22:29 ` Bjorn Helgaas
2026-07-29 9:29 ` Musham, Sai Krishna
2026-07-29 9:54 ` Krzysztof Kozlowski [this message]
2026-07-28 20:20 ` [PATCH v2 2/2] pci: AMD: Add CPM6 host controller support to AMD MDB PCIe driver Sai Krishna Musham
2026-07-28 20:33 ` sashiko-bot
2026-07-28 22:27 ` Bjorn Helgaas
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