From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Inochi Amaoto <inochiama@gmail.com>
Cc: Chen Wang <unicorn_wang@outlook.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Inochi Amaoto <inochiama@outlook.com>,
Yixun Lan <dlan@gentoo.org>, LKML <linux-kernel@vger.kernel.org>,
linux-serial <linux-serial@vger.kernel.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 2/2] serial: 8250_dw: Add Sophgo SG2044 quirk
Date: Mon, 21 Oct 2024 11:52:38 +0300 (EEST) [thread overview]
Message-ID: <29d8e2a6-d0e7-0f74-1f5c-4f285ec1e9ee@linux.intel.com> (raw)
In-Reply-To: <20241021072606.585878-3-inochiama@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1927 bytes --]
On Mon, 21 Oct 2024, Inochi Amaoto wrote:
> SG2044 relys on an internal divisor when calculating bitrate, which
> means a wrong clock for the most common bitrates. So add a quirk for
> this uart device to skip the set rate call and only relys on the
> internal UART divisor.
>
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
I wonder though does this mean the numbers userspace can read from kernel
are bogus and if something can be done about that?
--
i.
> ---
> drivers/tty/serial/8250/8250_dw.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
> index ab9e7f204260..51894c93c8a3 100644
> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -750,7 +750,7 @@ static const struct dw8250_platform_data dw8250_renesas_rzn1_data = {
> .quirks = DW_UART_QUIRK_CPR_VALUE | DW_UART_QUIRK_IS_DMA_FC,
> };
>
> -static const struct dw8250_platform_data dw8250_starfive_jh7100_data = {
> +static const struct dw8250_platform_data dw8250_skip_set_rate_data = {
> .usr_reg = DW_UART_USR,
> .quirks = DW_UART_QUIRK_SKIP_SET_RATE,
> };
> @@ -760,7 +760,8 @@ static const struct of_device_id dw8250_of_match[] = {
> { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data },
> { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data },
> { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data },
> - { .compatible = "starfive,jh7100-uart", .data = &dw8250_starfive_jh7100_data },
> + { .compatible = "sophgo,sg2044-uart", .data = &dw8250_skip_set_rate_data },
> + { .compatible = "starfive,jh7100-uart", .data = &dw8250_skip_set_rate_data },
> { /* Sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, dw8250_of_match);
>
next prev parent reply other threads:[~2024-10-21 8:52 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-21 7:26 [PATCH v2 0/2] serial: 8250_dw: Introduce SG2044 uart support Inochi Amaoto
2024-10-21 7:26 ` [PATCH v2 1/2] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2044 uarts Inochi Amaoto
2024-10-21 12:10 ` Conor Dooley
2024-10-21 12:18 ` Inochi Amaoto
2024-10-21 12:21 ` Conor Dooley
2024-10-21 12:23 ` Inochi Amaoto
2024-10-22 17:25 ` Conor Dooley
2024-10-23 0:32 ` Inochi Amaoto
2024-10-23 18:53 ` Conor Dooley
2024-10-21 18:00 ` Rob Herring
2024-10-21 7:26 ` [PATCH v2 2/2] serial: 8250_dw: Add Sophgo SG2044 quirk Inochi Amaoto
2024-10-21 8:29 ` Andy Shevchenko
2024-10-21 8:52 ` Ilpo Järvinen [this message]
2024-10-21 10:08 ` Inochi Amaoto
2024-10-21 10:17 ` Ilpo Järvinen
2024-10-21 12:03 ` Andy Shevchenko
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