* [PATCH v2 0/2] soc: qcom: llcc: Add LLCC support for the QCS615 platform
@ 2024-10-10 6:38 Song Xue
2024-10-10 6:38 ` [PATCH v2 1/2] dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC Song Xue
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Song Xue @ 2024-10-10 6:38 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Conor Dooley, Rob Herring,
Krzysztof Kozlowski
Cc: kernel, linux-arm-msm, devicetree, linux-kernel, Song Xue
The QCS615 platform has LLCC(Last Level Cache Controller) as the system
cache controller. It includes 1 LLCC instance and 1 LLCC broadcast
interface.
Add Bindings and LLCC tables for the QCS615 platform.
Signed-off-by: Song Xue <quic_songxue@quicinc.com>
---
Changes in v2:
- Update the format of the slice configuration setting.
- Link to v1: https://lore.kernel.org/r/d275829f-190c-4b73-a378-1025ca8277ed@quicinc.com
---
Song Xue (2):
dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC
soc: qcom: llcc: Add configuration data for QCS615
.../devicetree/bindings/cache/qcom,llcc.yaml | 2 +
drivers/soc/qcom/llcc-qcom.c | 55 ++++++++++++++++++++++
2 files changed, 57 insertions(+)
---
base-commit: b6270c3bca987530eafc6a15f9d54ecd0033e0e3
change-id: 20241009-add_llcc_support_for_qcs615-6685f5c031b3
Best regards,
--
Song Xue <quic_songxue@quicinc.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 1/2] dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC
2024-10-10 6:38 [PATCH v2 0/2] soc: qcom: llcc: Add LLCC support for the QCS615 platform Song Xue
@ 2024-10-10 6:38 ` Song Xue
2024-10-10 8:03 ` Krzysztof Kozlowski
2024-10-10 6:38 ` [PATCH v2 2/2] soc: qcom: llcc: Add configuration data for QCS615 Song Xue
2024-11-04 4:13 ` [PATCH v2 0/2] soc: qcom: llcc: Add LLCC support for the QCS615 platform Bjorn Andersson
2 siblings, 1 reply; 5+ messages in thread
From: Song Xue @ 2024-10-10 6:38 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Conor Dooley, Rob Herring,
Krzysztof Kozlowski
Cc: kernel, linux-arm-msm, devicetree, linux-kernel, Song Xue
Document the LLCC on the QCS615 platform.
The QCS615 platform has LLCC as the system cache controller. It
includes 1 LLCC instance and 1 broadcast interface.
Signed-off-by: Song Xue <quic_songxue@quicinc.com>
---
Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index 68ea5f70b75f031cd8b23cf48d566c3a760dab77..51dadf661fc82114324aee0dab6e49387dad81e2 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -20,6 +20,7 @@ description: |
properties:
compatible:
enum:
+ - qcom,qcs615-llcc
- qcom,qdu1000-llcc
- qcom,sa8775p-llcc
- qcom,sc7180-llcc
@@ -67,6 +68,7 @@ allOf:
compatible:
contains:
enum:
+ - qcom,qcs615-llcc
- qcom,sc7180-llcc
- qcom,sm6350-llcc
then:
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] soc: qcom: llcc: Add configuration data for QCS615
2024-10-10 6:38 [PATCH v2 0/2] soc: qcom: llcc: Add LLCC support for the QCS615 platform Song Xue
2024-10-10 6:38 ` [PATCH v2 1/2] dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC Song Xue
@ 2024-10-10 6:38 ` Song Xue
2024-11-04 4:13 ` [PATCH v2 0/2] soc: qcom: llcc: Add LLCC support for the QCS615 platform Bjorn Andersson
2 siblings, 0 replies; 5+ messages in thread
From: Song Xue @ 2024-10-10 6:38 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Conor Dooley, Rob Herring,
Krzysztof Kozlowski
Cc: kernel, linux-arm-msm, devicetree, linux-kernel, Song Xue
Add LLCC configuration support for the QCS615 platform.
Signed-off-by: Song Xue <quic_songxue@quicinc.com>
---
drivers/soc/qcom/llcc-qcom.c | 55 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index a470285f54a875bf2262aac7b0f84ed8fd028ef1..3dcbad0c662d3e4458044c168ed619d31b2b57be 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -2225,6 +2225,45 @@ static const struct llcc_slice_config sm8650_data[] = {
},
};
+static const struct llcc_slice_config qcs615_data[] = {
+ {
+ .usecase_id = LLCC_CPUSS,
+ .slice_id = 1,
+ .max_cap = 128,
+ .priority = 1,
+ .bonus_ways = 0xf,
+ .cache_mode = 0,
+ .activate_on_init = true,
+ .write_scid_en = true,
+ }, {
+ .usecase_id = LLCC_MDM,
+ .slice_id = 8,
+ .max_cap = 256,
+ .priority = 0,
+ .fixed_size = true,
+ .bonus_ways = 0xf,
+ .cache_mode = 0,
+ .activate_on_init = true,
+ }, {
+ .usecase_id = LLCC_GPUHTW,
+ .slice_id = 11,
+ .max_cap = 128,
+ .priority = 1,
+ .fixed_size = true,
+ .bonus_ways = 0xf,
+ .cache_mode = 0,
+ .activate_on_init = true,
+ }, {
+ .usecase_id = LLCC_GPU,
+ .slice_id = 12,
+ .max_cap = 128,
+ .priority = 1,
+ .bonus_ways = 0xf,
+ .cache_mode = 0,
+ .activate_on_init = true,
+ },
+};
+
static const struct llcc_slice_config qdu1000_data_2ch[] = {
{
.usecase_id = LLCC_MDMHPGRW,
@@ -2646,6 +2685,16 @@ static const u32 llcc_v2_1_reg_offset[] = {
[LLCC_COMMON_STATUS0] = 0x0003400c,
};
+static const struct qcom_llcc_config qcs615_cfg[] = {
+ {
+ .sct_data = qcs615_data,
+ .size = ARRAY_SIZE(qcs615_data),
+ .need_llcc_cfg = true,
+ .reg_offset = llcc_v1_reg_offset,
+ .edac_reg_offset = &llcc_v1_edac_reg_offset,
+ },
+};
+
static const struct qcom_llcc_config qdu1000_cfg[] = {
{
.sct_data = qdu1000_data_8ch,
@@ -2829,6 +2878,11 @@ static const struct qcom_llcc_config x1e80100_cfg[] = {
},
};
+static const struct qcom_sct_config qcs615_cfgs = {
+ .llcc_config = qcs615_cfg,
+ .num_config = ARRAY_SIZE(qcs615_cfg),
+};
+
static const struct qcom_sct_config qdu1000_cfgs = {
.llcc_config = qdu1000_cfg,
.num_config = ARRAY_SIZE(qdu1000_cfg),
@@ -3484,6 +3538,7 @@ static int qcom_llcc_probe(struct platform_device *pdev)
}
static const struct of_device_id qcom_llcc_of_match[] = {
+ { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs},
{ .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
{ .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC
2024-10-10 6:38 ` [PATCH v2 1/2] dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC Song Xue
@ 2024-10-10 8:03 ` Krzysztof Kozlowski
0 siblings, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2024-10-10 8:03 UTC (permalink / raw)
To: Song Xue, Bjorn Andersson, Konrad Dybcio, Conor Dooley,
Rob Herring, Krzysztof Kozlowski
Cc: kernel, linux-arm-msm, devicetree, linux-kernel
On 10/10/2024 08:38, Song Xue wrote:
> Document the LLCC on the QCS615 platform.
>
> The QCS615 platform has LLCC as the system cache controller. It
> includes 1 LLCC instance and 1 broadcast interface.
>
> Signed-off-by: Song Xue <quic_songxue@quicinc.com>
<form letter>
This is a friendly reminder during the review process.
It looks like you received a tag and forgot to add it.
If you do not know the process, here is a short explanation:
Please add Acked-by/Reviewed-by/Tested-by tags when posting new
versions, under or above your Signed-off-by tag. Tag is "received", when
provided in a message replied to you on the mailing list. Tools like b4
can help here. However, there's no need to repost patches *only* to add
the tags. The upstream maintainer will do that for tags received on the
version they apply.
https://elixir.bootlin.com/linux/v6.5-rc3/source/Documentation/process/submitting-patches.rst#L577
If a tag was not added on purpose, please state why and what changed.
</form letter>
Your internal guideline tells you this, so please read it before posting
any further patches.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 0/2] soc: qcom: llcc: Add LLCC support for the QCS615 platform
2024-10-10 6:38 [PATCH v2 0/2] soc: qcom: llcc: Add LLCC support for the QCS615 platform Song Xue
2024-10-10 6:38 ` [PATCH v2 1/2] dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC Song Xue
2024-10-10 6:38 ` [PATCH v2 2/2] soc: qcom: llcc: Add configuration data for QCS615 Song Xue
@ 2024-11-04 4:13 ` Bjorn Andersson
2 siblings, 0 replies; 5+ messages in thread
From: Bjorn Andersson @ 2024-11-04 4:13 UTC (permalink / raw)
To: Konrad Dybcio, Conor Dooley, Rob Herring, Krzysztof Kozlowski,
Song Xue
Cc: kernel, linux-arm-msm, devicetree, linux-kernel
On Thu, 10 Oct 2024 14:38:38 +0800, Song Xue wrote:
> The QCS615 platform has LLCC(Last Level Cache Controller) as the system
> cache controller. It includes 1 LLCC instance and 1 LLCC broadcast
> interface.
>
> Add Bindings and LLCC tables for the QCS615 platform.
>
>
> [...]
Applied, thanks!
[1/2] dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC
commit: 08e2d7c64edddbc0b0885be901b3f752ea245587
[2/2] soc: qcom: llcc: Add configuration data for QCS615
commit: 9f85ed1976bc7882a300aedb556148dbbb245b96
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 5+ messages in thread
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2024-10-10 6:38 ` [PATCH v2 1/2] dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC Song Xue
2024-10-10 8:03 ` Krzysztof Kozlowski
2024-10-10 6:38 ` [PATCH v2 2/2] soc: qcom: llcc: Add configuration data for QCS615 Song Xue
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