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Tegra238 has its own BPMP > compatible, so give Tegra234, Tegra238 and Tegra264 dedicated SoC data > selected through their specific compatibles, built on top of a common > TEGRA186_BPMP_SOC_COMMON initializer. This allows chip specific > properties to be described in the SoC data. Tegra186 and Tegra194 keep > using tegra186_soc. >=20 > Also build bpmp-tegra186.o and the shared match table for > CONFIG_ARCH_TEGRA_238_SOC, so that a Tegra238-only configuration binds > the driver. >=20 > Signed-off-by: Johnny Liu > --- > drivers/firmware/tegra/Makefile | 1 + > drivers/firmware/tegra/bpmp.c | 54 ++++++++++++++++++++++----------- > 2 files changed, 38 insertions(+), 17 deletions(-) This refactoring in this patch makes no sense unless you first read the=20 next patch, plus it has the unrelated factor of adding Tegra238 support,=20 which makes it quite confusing. Can you move the TEGRA186_BPMP_SOC_COMMON refactoring into the 'per-SoC=20 EMC clock ID' patch, and have the Tegra238 addition as a separate patch=20 before or after it? Thanks! Mikko >=20 > diff --git a/drivers/firmware/tegra/Makefile b/drivers/firmware/tegra/Mak= efile > index 97f7a5db9d0a..21e87f3afffe 100644 > --- a/drivers/firmware/tegra/Makefile > +++ b/drivers/firmware/tegra/Makefile > @@ -4,6 +4,7 @@ tegra-bpmp-$(CONFIG_ARCH_TEGRA_210_SOC) +=3D bpmp-tegra21= 0.o > tegra-bpmp-$(CONFIG_ARCH_TEGRA_186_SOC) +=3D bpmp-tegra186.o > tegra-bpmp-$(CONFIG_ARCH_TEGRA_194_SOC) +=3D bpmp-tegra186.o > tegra-bpmp-$(CONFIG_ARCH_TEGRA_234_SOC) +=3D bpmp-tegra186.o > +tegra-bpmp-$(CONFIG_ARCH_TEGRA_238_SOC) +=3D bpmp-tegra186.o > tegra-bpmp-$(CONFIG_ARCH_TEGRA_264_SOC) +=3D bpmp-tegra186.o > tegra-bpmp-$(CONFIG_DEBUG_FS) +=3D bpmp-debugfs.o > tegra-bpmp-$(CONFIG_SYSFS) +=3D bpmp-sysfs.o > diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.= c > index d3508e98e338..beeb385870f5 100644 > --- a/drivers/firmware/tegra/bpmp.c > +++ b/drivers/firmware/tegra/bpmp.c > @@ -1131,25 +1131,41 @@ static const struct dev_pm_ops tegra_bpmp_pm_ops = =3D { > #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \ > IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ > IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) || \ > + IS_ENABLED(CONFIG_ARCH_TEGRA_238_SOC) || \ > IS_ENABLED(CONFIG_ARCH_TEGRA_264_SOC) > +#define TEGRA186_BPMP_SOC_COMMON \ > + .channels =3D { \ > + .cpu_tx =3D { \ > + .offset =3D 3, \ > + .timeout =3D 60 * USEC_PER_SEC, \ > + }, \ > + .thread =3D { \ > + .offset =3D 0, \ > + .count =3D 3, \ > + .timeout =3D 600 * USEC_PER_SEC, \ > + }, \ > + .cpu_rx =3D { \ > + .offset =3D 13, \ > + .timeout =3D 0, \ > + }, \ > + }, \ > + .ops =3D &tegra186_bpmp_ops, \ > + .num_resets =3D 193 > + > static const struct tegra_bpmp_soc tegra186_soc =3D { > - .channels =3D { > - .cpu_tx =3D { > - .offset =3D 3, > - .timeout =3D 60 * USEC_PER_SEC, > - }, > - .thread =3D { > - .offset =3D 0, > - .count =3D 3, > - .timeout =3D 600 * USEC_PER_SEC, > - }, > - .cpu_rx =3D { > - .offset =3D 13, > - .timeout =3D 0, > - }, > - }, > - .ops =3D &tegra186_bpmp_ops, > - .num_resets =3D 193, > + TEGRA186_BPMP_SOC_COMMON, > +}; > + > +static const struct tegra_bpmp_soc tegra234_soc =3D { > + TEGRA186_BPMP_SOC_COMMON, > +}; > + > +static const struct tegra_bpmp_soc tegra238_soc =3D { > + TEGRA186_BPMP_SOC_COMMON, > +}; > + > +static const struct tegra_bpmp_soc tegra264_soc =3D { > + TEGRA186_BPMP_SOC_COMMON, > }; > #endif > =20 > @@ -1180,8 +1196,12 @@ static const struct of_device_id tegra_bpmp_match[= ] =3D { > #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \ > IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ > IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) || \ > + IS_ENABLED(CONFIG_ARCH_TEGRA_238_SOC) || \ > IS_ENABLED(CONFIG_ARCH_TEGRA_264_SOC) > { .compatible =3D "nvidia,tegra186-bpmp", .data =3D &tegra186_soc }, > + { .compatible =3D "nvidia,tegra234-bpmp", .data =3D &tegra234_soc }, > + { .compatible =3D "nvidia,tegra238-bpmp", .data =3D &tegra238_soc }, > + { .compatible =3D "nvidia,tegra264-bpmp", .data =3D &tegra264_soc }, > #endif > #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) > { .compatible =3D "nvidia,tegra210-bpmp", .data =3D &tegra210_soc }, > --=20 > 2.43.0 >=20 >=20