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From: Martin Botka <martin.botka@somainline.org>
To: Marijn Suijten <marijn.suijten@somainline.org>
Cc: phone-devel@vger.kernel.org, Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	~postmarketos/upstreaming@lists.sr.ht,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@somainline.org>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Jami Kettunen <jami.kettunen@somainline.org>,
	Lux Aliaga <they@mint.lgbt>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/3] arm64: dts: qcom: sm6125-seine: Enable GPI DMA 0, QUP 0 and I2C SEs
Date: Sun, 18 Dec 2022 12:09:02 +0100	[thread overview]
Message-ID: <2Z23NR.0IJBROJ4Q8013@somainline.org> (raw)
In-Reply-To: <20221216233408.1283581-4-marijn.suijten@somainline.org>



On Sat, Dec 17 2022 at 12:34:08 AM +01:00:00, Marijn Suijten 
<marijn.suijten@somainline.org> wrote:
> Enable I2C Serial Engines 1, 2 and 3 which are known to have hardware
> connected to them, leaving the rest disabled to save on power.  For
> this, only GPI DMA 0 and QUP 0 need to be enabled, as nothing seems to
> be connected to Serial Engines on GPU DMA 1 / QUP 1.  Beyond this
> downstream only defines a UART console available on Serial Engine 4
> which also resides on QUP 0.
> 
> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
> ---
>  .../qcom/sm6125-sony-xperia-seine-pdx201.dts  | 29 
> +++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git 
> a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts 
> b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
> index 1b9e40d3d269..b1de85d8f1c8 100644
> --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
> +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
> @@ -141,10 +141,35 @@ active-config0 {
>  	};
>  };
> 
> +&gpi_dma0 {
> +	status = "okay";
> +};
> +
>  &hsusb_phy1 {
>  	status = "okay";
>  };
> 
> +&i2c1 {
> +	clock-frequency = <400000>;
> +	status = "okay";
> +
> +	/* NXP PN553 NFC @ 28 */
> +};
> +
> +&i2c2 {
> +	clock-frequency = <400000>;
> +	status = "okay";
> +
> +	/* Samsung touchscreen @ 48 */
> +};
> +
> +&i2c3 {
> +	clock-frequency = <1000000>;
> +	status = "okay";
> +
> +	/* Cirrus Logic CS35L41 boosted audio amplifier @ 40 */
> +};
> +
>  &pm6125_adc {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&camera_flash_therm &emmc_ufs_therm &rf_pa1_therm>;
> @@ -246,6 +271,10 @@ &pon_resin {
>  	linux,code = <KEY_VOLUMEUP>;
>  };
> 
> +&qupv3_id_0 {
> +	status = "okay";
> +};
> +
>  &sdc2_off_state {
>  	sd-cd-pins {
>  		pins = "gpio98";
> --
> 2.39.0
> 
Reviewed-by: Martin Botka <martin.botka@somainline.org>

-Martin



  parent reply	other threads:[~2022-12-18 11:09 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-16 23:34 [PATCH v2 0/3] arm64: dts: qcom: sm6125: QUPs, SPI and Seine I2C buses Marijn Suijten
2022-12-16 23:34 ` [PATCH v2 1/3] arm64: dts: qcom: sm6125: Add pin configs for QUP SPI/I2C Serial Engines Marijn Suijten
2022-12-16 23:34 ` [PATCH v2 2/3] arm64: dts: qcom: sm6125: Add QUPs with SPI and I2C " Marijn Suijten
2022-12-17 15:19   ` Konrad Dybcio
2022-12-18 10:24     ` Marijn Suijten
2022-12-18 11:08   ` Martin Botka
2022-12-16 23:34 ` [PATCH v2 3/3] arm64: dts: qcom: sm6125-seine: Enable GPI DMA 0, QUP 0 and I2C SEs Marijn Suijten
2022-12-17 15:20   ` Konrad Dybcio
2022-12-18 11:09   ` Martin Botka [this message]
2022-12-29 17:13 ` [PATCH v2 0/3] arm64: dts: qcom: sm6125: QUPs, SPI and Seine I2C buses Bjorn Andersson
2022-12-29 17:21   ` Marijn Suijten
2022-12-29 17:25     ` Marijn Suijten
2022-12-29 17:23 ` Bjorn Andersson

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