From: David Laight <David.Laight@ACULAB.COM>
To: 'Damien Le Moal' <damien.lemoal@opensource.wdc.com>,
Rick Wertenbroek <rick.wertenbroek@gmail.com>,
"alberto.dassatti@heig-vd.ch" <alberto.dassatti@heig-vd.ch>
Cc: "xxm@rock-chips.com" <xxm@rock-chips.com>,
"rick.wertenbroek@heig-vd.ch" <rick.wertenbroek@heig-vd.ch>,
"stable@vger.kernel.org" <stable@vger.kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Jani Nikula" <jani.nikula@intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Mikko Kovanen" <mikko.kovanen@aavamobile.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-rockchip@lists.infradead.org"
<linux-rockchip@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
Subject: RE: [PATCH v2 8/9] PCI: rockchip: Use u32 variable to access 32-bit registers
Date: Wed, 15 Feb 2023 10:46:16 +0000 [thread overview]
Message-ID: <2a80c4e1f1ad42c6849521d1e644b003@AcuMS.aculab.com> (raw)
In-Reply-To: <0fa5cef4-7096-7f59-422a-98011d01437c@opensource.wdc.com>
From: Damien Le Moal
> Sent: 15 February 2023 01:34
>
> On 2/14/23 23:08, Rick Wertenbroek wrote:
> > Previously u16 variables were used to access 32-bit registers, this
> > resulted in not all of the data being read from the registers. Also
> > the left shift of more than 16-bits would result in moving data out
> > of the variable. Use u32 variables to access 32-bit registers
> >
> > Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller")
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
> > ---
> > drivers/pci/controller/pcie-rockchip-ep.c | 10 +++++-----
> > drivers/pci/controller/pcie-rockchip.h | 1 +
> > 2 files changed, 6 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
> > index ca5b363ba..b7865a94e 100644
> > --- a/drivers/pci/controller/pcie-rockchip-ep.c
> > +++ b/drivers/pci/controller/pcie-rockchip-ep.c
> > @@ -292,15 +292,15 @@ static int rockchip_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 vfn,
> > {
> > struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
> > struct rockchip_pcie *rockchip = &ep->rockchip;
> > - u16 flags;
> > + u32 flags;
> >
> > flags = rockchip_pcie_read(rockchip,
> > ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
> > ROCKCHIP_PCIE_EP_MSI_CTRL_REG);
> > flags &= ~ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_MASK;
> > flags |=
> > - ((multi_msg_cap << 1) << ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET) |
> > - PCI_MSI_FLAGS_64BIT;
> > + (multi_msg_cap << ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET) |
>
> ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET is 17 and multi_msg_cap is a u8...
> Not nice.
It really doesn't matter.
As soon as you do any arithmetic char and short are promoted to int.
David
-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
next prev parent reply other threads:[~2023-02-15 10:46 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-14 14:08 [PATCH v2 0/9] PCI: rockchip: Fix RK3399 PCIe endpoint controller driver Rick Wertenbroek
2023-02-14 14:08 ` [PATCH v2 1/9] PCI: rockchip: Remove writes to unused registers Rick Wertenbroek
2023-02-14 23:56 ` Damien Le Moal
2023-02-15 9:04 ` Rick Wertenbroek
2023-02-15 9:17 ` Damien Le Moal
2023-02-15 9:58 ` Damien Le Moal
2023-02-16 7:28 ` Damien Le Moal
2023-02-16 8:43 ` Rick Wertenbroek
2023-02-16 9:54 ` Damien Le Moal
2023-02-14 14:08 ` [PATCH v2 2/9] PCI: rockchip: Write PCI Device ID to correct register Rick Wertenbroek
2023-02-14 23:57 ` Damien Le Moal
2023-02-14 14:08 ` [PATCH v2 3/9] PCI: rockchip: Assert PCI Configuration Enable bit after probe Rick Wertenbroek
2023-02-14 23:58 ` Damien Le Moal
2023-02-14 14:08 ` [PATCH v2 4/9] PCI: rockchip: Add poll and timeout to wait for PHY PLLs to be locked Rick Wertenbroek
2023-02-15 1:01 ` Damien Le Moal
2023-02-14 14:08 ` [PATCH v2 5/9] arm64: dts: rockchip: Add dtsi entry for RK3399 PCIe endpoint core Rick Wertenbroek
2023-02-15 1:03 ` Damien Le Moal
2023-02-14 14:08 ` [PATCH v2 6/9] PCI: rockchip: Fix window mapping and address translation for endpoint Rick Wertenbroek
2023-02-15 1:20 ` Damien Le Moal
2023-02-14 14:08 ` [PATCH v2 7/9] PCI: rockchip: Fix legacy IRQ generation for RK3399 PCIe endpoint core Rick Wertenbroek
2023-02-15 1:26 ` Damien Le Moal
2023-02-15 2:38 ` Damien Le Moal
2023-02-14 14:08 ` [PATCH v2 8/9] PCI: rockchip: Use u32 variable to access 32-bit registers Rick Wertenbroek
2023-02-15 1:34 ` Damien Le Moal
2023-02-15 10:46 ` David Laight [this message]
2023-02-15 11:20 ` Damien Le Moal
2023-03-14 15:45 ` Rick Wertenbroek
2023-02-14 14:08 ` [PATCH v2 9/9] PCI: rockchip: Add parameter check for RK3399 PCIe endpoint core set_msi() Rick Wertenbroek
2023-02-15 1:39 ` Damien Le Moal
2023-02-21 10:47 ` Rick Wertenbroek
2023-02-21 10:55 ` Damien Le Moal
2023-02-21 13:19 ` Rick Wertenbroek
2023-02-21 16:37 ` Rick Wertenbroek
2023-02-21 22:01 ` Damien Le Moal
2023-02-21 21:57 ` Damien Le Moal
2023-02-15 1:51 ` [PATCH v2 0/9] PCI: rockchip: Fix RK3399 PCIe endpoint controller driver Damien Le Moal
2023-02-15 10:28 ` Rick Wertenbroek
2023-02-15 10:41 ` Damien Le Moal
2023-03-14 0:02 ` Damien Le Moal
2023-03-14 7:57 ` Rick Wertenbroek
2023-03-14 8:10 ` Damien Le Moal
2023-03-14 14:53 ` Rick Wertenbroek
2023-03-14 22:54 ` Damien Le Moal
2023-03-15 0:00 ` Damien Le Moal
2023-03-16 12:52 ` Rick Wertenbroek
2023-03-16 16:34 ` Rick Wertenbroek
2023-03-16 22:09 ` Damien Le Moal
2023-04-13 13:49 ` Lorenzo Pieralisi
2023-04-13 14:34 ` Rick Wertenbroek
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