Re: [PATCH 2/5] clk: qcom: add Global Clock controller (GCC) driver for IPQ9650 SoC

Kathiravan Thirumoorthy
2026-04-29T04:01:33Z

On 4/24/2026 5:00 PM, Konrad Dybcio wrote:
> On 4/15/26 3:33 PM, Kathiravan Thirumoorthy wrote:
>> Add support for the global clock controller found on IPQ9650 SoC.
>>
>> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
>> ---
> [...]
>
>> +static struct clk_rcg2 gcc_pcnoc_bfdcd_clk_src = {
>> + .cmd_rcgr = 0x31004,
>> + .mnd_width = 0,
>> + .hid_width = 5,
>> + .parent_map = gcc_parent_map_0,
>> + .freq_tbl = ftbl_gcc_pcnoc_bfdcd_clk_src,
>> + .clkr.hw.init = &(const struct clk_init_data) {
>> + .name = "gcc_pcnoc_bfdcd_clk_src",
>> + .parent_data = gcc_parent_data_0,
>> + .num_parents = ARRAY_SIZE(gcc_parent_data_0),
>> + /*
>> + * There are no consumers for this source in kernel yet,
>> + * (will be added soon), so the clock framework
>> + * disables this source. But some of the clocks
>> + * initialized by boot loaders uses this source. So we
>> + * need to keep this clock ON. Add the
>> + * CLK_IGNORE_UNUSED flag so the clock will not be
>> + * disabled. Once the consumer in kernel is added, we
>> + * can get rid of this flag.
>> + */
>> + .flags = CLK_IS_CRITICAL,
> I think this clock is normally governed by RPM.. is there RPM/H on this
> platform? (doc access still pending..)

There is no RPM in this SoC.

> If not, what's your plan for this? icc-clk?

USB and PCIe clocks uses this source. So once those peripheral supports
are landed, we can get rid off this.

>
> Konrad