devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Valentina Fernandez <valentina.fernandezalanis@microchip.com>,
	conor.dooley@microchip.com, daire.mcnamara@microchip.com,
	paul.walmsley@sifive.com, palmer@dabbelt.com, robh@kernel.org,
	krzk+dt@kernel.org, aou@eecs.berkeley.edu, alex@ghiti.fr
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v1 5/5] riscv: dts: microchip: add a device tree for Discovery Kit
Date: Thu, 28 Aug 2025 19:46:55 +0200	[thread overview]
Message-ID: <2b1eb8fd-2a64-4745-ad93-abc53d240b69@kernel.org> (raw)
In-Reply-To: <20250825161952.3902672-6-valentina.fernandezalanis@microchip.com>

On 25/08/2025 18:19, Valentina Fernandez wrote:
> +++ b/arch/riscv/boot/dts/microchip/mpfs-disco-kit-fabric.dtsi
> @@ -0,0 +1,58 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/* Copyright (c) 2020-2025 Microchip Technology Inc */
> +
> +/ {
> +	core_pwm0: pwm@40000000 {
> +		compatible = "microchip,corepwm-rtl-v4";
> +		reg = <0x0 0x40000000 0x0 0xF0>;
> +		microchip,sync-update-mask = /bits/ 32 <0>;
> +		#pwm-cells = <3>;
> +		clocks = <&ccc_sw CLK_CCC_PLL0_OUT3>;
> +		status = "disabled";
> +	};
> +
> +	i2c2: i2c@40000200 {
> +		compatible = "microchip,corei2c-rtl-v7";
> +		reg = <0x0 0x40000200 0x0 0x100>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		clocks = <&ccc_sw CLK_CCC_PLL0_OUT3>;
> +		interrupt-parent = <&plic>;
> +		interrupts = <122>;
> +		clock-frequency = <100000>;
> +		status = "disabled";
> +	};
> +
> +	ihc: mailbox {
> +		compatible = "microchip,sbi-ipc";
> +		interrupt-parent = <&plic>;
> +		interrupts = <180>, <179>, <178>, <177>;
> +		interrupt-names = "hart-1", "hart-2", "hart-3", "hart-4";
> +		#mbox-cells = <1>;
> +		status = "disabled";
> +	};
> +
> +	mailbox@50000000 {
> +		compatible = "microchip,miv-ihc-rtl-v2";
> +		microchip,ihc-chan-disabled-mask = /bits/ 16 <0>;

Does not look like following DTS coding style - order of properties.

> +		reg = <0x0 0x50000000 0x0 0x1c000>;
> +		interrupt-parent = <&plic>;
> +		interrupts = <180>, <179>, <178>, <177>;
> +		interrupt-names = "hart-1", "hart-2", "hart-3", "hart-4";
> +		#mbox-cells = <1>;
> +		status = "disabled";
> +	};
> +
> +	refclk_ccc: cccrefclk {

Please use name for all fixed clocks which matches current format
recommendation: 'clock-<freq>' (see also the pattern in the binding for
any other options).

https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/clock/fixed-clock.yaml

Or anything more reasonable than just bunch of letters.

> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;


> +	};
> +};
> +
> +&ccc_sw {
> +	clocks = <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>,
> +		 <&refclk_ccc>, <&refclk_ccc>;
> +	clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1",
> +		      "dll0_ref", "dll1_ref";
> +	status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts
> new file mode 100644
> index 000000000000..742369470ab0
> --- /dev/null
> +++ b/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts
> @@ -0,0 +1,191 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/* Copyright (c) 2020-2025 Microchip Technology Inc */
> +
> +/dts-v1/;
> +
> +#include "mpfs.dtsi"
> +#include "mpfs-disco-kit-fabric.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +
> +/ {
> +	model = "Microchip PolarFire-SoC Discovery Kit";
> +	compatible = "microchip,mpfs-disco-kit-reference-rtl-v2507",
> +		     "microchip,mpfs-disco-kit",
> +		     "microchip,mpfs";
> +
> +	aliases {
> +		ethernet0 = &mac0;
> +		serial4 = &mmuart4;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial4:115200n8";
> +	};
> +
> +	leds {
> +		compatible = "gpio-leds";
> +
> +		led-1 {
> +			gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
> +			color = <LED_COLOR_ID_AMBER>;
> +			label = "led1";
> +		};
> +
> +		led-2 {
> +			gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
> +			color = <LED_COLOR_ID_RED>;
> +			label = "led2";
> +		};
> +
> +		led-3 {
> +			gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> +			color = <LED_COLOR_ID_AMBER>;
> +			label = "led3";
> +		};
> +
> +		led-4 {
> +			gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
> +			color = <LED_COLOR_ID_RED>;
> +			label = "led4";
> +		};
> +
> +		led-5 {
> +			gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
> +			color = <LED_COLOR_ID_AMBER>;
> +			label = "led5";
> +		};
> +
> +		led-6 {
> +			gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
> +			color = <LED_COLOR_ID_RED>;
> +			label = "led6";
> +		};
> +
> +		led-7 {
> +			gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;
> +			color = <LED_COLOR_ID_AMBER>;
> +			label = "led7";
> +		};
> +
> +		led-8 {
> +			gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
> +			color = <LED_COLOR_ID_RED>;
> +			label = "led8";
> +		};
> +	};
> +
> +	ddrc_cache_lo: memory@80000000 {
> +		device_type = "memory";
> +		reg = <0x0 0x80000000 0x0 0x40000000>;
> +		status = "okay";

Why? Did you disable it anywhere?

> +	};
> +
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		hss_payload: region@BFC00000 {

Don't mix cases. Should be lowercase hex everywhere.

Best regards,
Krzysztof

  reply	other threads:[~2025-08-28 17:47 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-25 16:19 [PATCH v1 0/5] Icicle Kit with prod device and Discovery Kit support Valentina Fernandez
2025-08-25 16:19 ` [PATCH v1 1/5] riscv: dts: microchip: add common board dtsi for icicle kit variants Valentina Fernandez
2025-08-25 16:19 ` [PATCH v1 2/5] dt-bindings: riscv: microchip: document icicle kit with production device Valentina Fernandez
2025-08-25 16:19 ` [PATCH v1 3/5] riscv: dts: microchip: add " Valentina Fernandez
2025-08-25 16:19 ` [PATCH v1 4/5] dt-bindings: riscv: microchip: document Discovery Kit Valentina Fernandez
2025-08-25 16:19 ` [PATCH v1 5/5] riscv: dts: microchip: add a device tree for " Valentina Fernandez
2025-08-28 17:46   ` Krzysztof Kozlowski [this message]
2025-09-01 15:28     ` Valentina.FernandezAlanis
2025-09-02  6:22       ` Krzysztof Kozlowski
2025-09-02  8:31         ` Conor Dooley
2025-09-02 13:47           ` Krzysztof Kozlowski
2025-09-02 16:38             ` Conor Dooley
2025-09-02  8:39         ` Valentina.FernandezAlanis
2025-08-28 16:14 ` [PATCH v1 0/5] Icicle Kit with prod device and Discovery Kit support Conor Dooley

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=2b1eb8fd-2a64-4745-ad93-abc53d240b69@kernel.org \
    --to=krzk@kernel.org \
    --cc=alex@ghiti.fr \
    --cc=aou@eecs.berkeley.edu \
    --cc=conor.dooley@microchip.com \
    --cc=daire.mcnamara@microchip.com \
    --cc=devicetree@vger.kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh@kernel.org \
    --cc=valentina.fernandezalanis@microchip.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).