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Wed, 06 May 2026 09:02:17 -0700 (PDT) X-Received: by 2002:a17:902:da87:b0:2b2:ebed:7afc with SMTP id d9443c01a7336-2ba7a33354emr44076295ad.27.1778083337057; Wed, 06 May 2026 09:02:17 -0700 (PDT) Received: from [10.204.101.47] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ba849032bfsm23120095ad.44.2026.05.06.09.02.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 May 2026 09:02:16 -0700 (PDT) Message-ID: <2b4ff288-1068-4411-bfbf-d007740710ae@oss.qualcomm.com> Date: Wed, 6 May 2026 21:32:09 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 13/13] arm64: dts: qcom: glymur: Add iris video node To: Vishnu Reddy , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Hans Verkuil , Stefan Schmidt , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanimir Varbanov , Joerg Roedel , Will Deacon , Robin Murphy , Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, iommu@lists.linux.dev References: <20260505-glymur-v4-0-17571dbd1caa@oss.qualcomm.com> <20260505-glymur-v4-13-17571dbd1caa@oss.qualcomm.com> Content-Language: en-US From: Vikash Garodia In-Reply-To: <20260505-glymur-v4-13-17571dbd1caa@oss.qualcomm.com> Content-Type: text/plain; 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> }; > > +&iris { > + status = "okay"; > +}; > + generally board enablement change goes as separate patch, not sure on this though. > &mdss { > status = "okay"; > }; > diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi > index f23cf81ddb77..c47443174f97 100644 > --- a/arch/arm64/boot/dts/qcom/glymur.dtsi > +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi > @@ -13,6 +13,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -4163,6 +4164,123 @@ usb_mp: usb@a400000 { > status = "disabled"; > }; > > + iris: video-codec@aa00000 { > + compatible = "qcom,glymur-iris"; > + reg = <0x0 0xaa00000 0x0 0xf0000>; > + > + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, > + <&videocc VIDEO_CC_MVS0C_CLK>, > + <&videocc VIDEO_CC_MVS0_CLK>, > + <&gcc GCC_VIDEO_AXI0C_CLK>, > + <&videocc VIDEO_CC_MVS0C_FREERUN_CLK>, > + <&videocc VIDEO_CC_MVS0_FREERUN_CLK>, > + <&gcc GCC_VIDEO_AXI1_CLK>, > + <&videocc VIDEO_CC_MVS1_CLK>, > + <&videocc VIDEO_CC_MVS1_FREERUN_CLK>; > + clock-names = "iface", > + "core", > + "vcodec0_core", > + "iface1", > + "core_freerun", > + "vcodec0_core_freerun", > + "iface2", > + "vcodec1_core", > + "vcodec1_core_freerun"; > + > + dma-coherent; > + > + interconnects = <&hsc_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY > + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, > + <&mmss_noc MASTER_VIDEO QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "cpu-cfg", > + "video-mem"; > + > + interrupts = ; > + > + iommus = <&apps_smmu 0x1940 0x0>, > + <&apps_smmu 0x1943 0x0>, > + <&apps_smmu 0x1944 0x0>, > + <&apps_smmu 0x19e0 0x0>; > + > + iommu-map = ; > + > + memory-region = <&video_mem>; > + > + operating-points-v2 = <&iris_opp_table>; > + > + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, > + <&videocc VIDEO_CC_MVS0_GDSC>, > + <&rpmhpd RPMHPD_MXC>, > + <&rpmhpd RPMHPD_MMCX>, > + <&videocc VIDEO_CC_MVS1_GDSC>; > + power-domain-names = "venus", > + "vcodec0", > + "mxc", > + "mmcx", > + "vcodec1"; > + > + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, > + <&gcc GCC_VIDEO_AXI0C_CLK_ARES>, > + <&videocc VIDEO_CC_MVS0C_FREERUN_CLK_ARES>, > + <&videocc VIDEO_CC_MVS0_FREERUN_CLK_ARES>, > + <&gcc GCC_VIDEO_AXI1_CLK_ARES>, > + <&videocc VIDEO_CC_MVS1_FREERUN_CLK_ARES>; > + reset-names = "bus0", > + "bus1", > + "core", > + "vcodec0_core", > + "bus2", > + "vcodec1_core"; > + > + /* > + * IRIS firmware is signed by vendors, only > + * enable on boards where the proper signed firmware > + * is available. > + */ > + status = "disabled"; > + > + iris_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-240000000 { > + opp-hz = /bits/ 64 <240000000 240000000 360000000>; > + required-opps = <&rpmhpd_opp_svs>, > + <&rpmhpd_opp_low_svs>; > + }; > + > + opp-338000000 { > + opp-hz = /bits/ 64 <338000000 338000000 507000000>; > + required-opps = <&rpmhpd_opp_svs>, > + <&rpmhpd_opp_svs>; > + }; > + > + opp-366000000 { > + opp-hz = /bits/ 64 <366000000 366000000 549000000>; > + required-opps = <&rpmhpd_opp_svs_l1>, > + <&rpmhpd_opp_svs_l1>; > + }; > + > + opp-444000000 { > + opp-hz = /bits/ 64 <444000000 444000000 666000000>; > + required-opps = <&rpmhpd_opp_svs_l1>, > + <&rpmhpd_opp_nom>; > + }; > + > + opp-533333334 { > + opp-hz = /bits/ 64 <533333334 533333334 800000000>; > + required-opps = <&rpmhpd_opp_svs_l1>, > + <&rpmhpd_opp_turbo>; > + }; > + > + opp-655000000 { > + opp-hz = /bits/ 64 <655000000 655000000 982000000>; > + required-opps = <&rpmhpd_opp_nom>, > + <&rpmhpd_opp_turbo_l1>; > + }; > + }; > + }; > + > mdss: display-subsystem@ae00000 { > compatible = "qcom,glymur-mdss"; > reg = <0x0 0x0ae00000 0x0 0x1000>; > otherwise, LGTM Reviewed-by: Vikash Garodia