From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 705BE6FA2 for ; Wed, 27 Sep 2023 15:27:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 77FF6C433CC; Wed, 27 Sep 2023 15:27:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1695828436; bh=rgo0WOp6LMa4GMgPHGGp872nNuKcGbXX9EO3lb6/LaQ=; h=Date:From:To:Subject:In-Reply-To:References:Cc:From; b=L4Od6E8W4nshRKxo9Igf6yldurSD5EY0RvFkIqhnOwOGTvjq0hAgzp+STNsGJaRDU d9nl0J1soonyMx8/Uqy4dQTlexdtknnFv/z3byV5odGXHKAd7Yuxr4D1HJWY5VqtrK 8syzuO7TwlW/nQfOU9PwPmPNFqTV4+czK9RYxDcyNefwbG8WBoowM9UG2oR2QxlEaA cTbHgk5W9tRV0xVNVzDtdOQbAIhuN/X5pdd4Accy5z44iItY+hh2NzyYmyIl/Def5A UUEhYMt92RtaUPtufKjGDqNjGP8IWeY9XIKuNxD58814yeRZJiF2a0ITP2iTyDYm7e uT3jfQ87AIOTw== Message-ID: <2b5dd78d308c007dfaf01eaf59fe8ec4.mripard@kernel.org> Date: Wed, 27 Sep 2023 07:20:12 +0000 From: "Maxime Ripard" To: "Miquel Raynal" Subject: Re: [PATCH v2 00/17] Prevent NAND chip unevaluated properties In-Reply-To: <20230606175246.190465-1-miquel.raynal@bootlin.com> References: <20230606175246.190465-1-miquel.raynal@bootlin.com> Cc: devicetree@vger.kernel.org, linux-mtd@lists.infradead.org, "Alexandre Torgue" , "AngeloGioacchino Del Regno" , "Brian Norris" , "Chen-Yu Tsai" , "Chris Packham" , "Christophe Kerello" , "Heiko Stuebner" , "Jernej Skrabec" , "Kamal Dasu" , "Krzysztof Kozlowski" , "Liang Yang" , "Manivannan Sadhasivam" , "Masahiro Yamada" , "Matthias Brugger" , "Maxime Coquelin" , "Maxime Ripard" , "Michael Walle" , "Paul Cercueil" , "Pratyush Yadav" , "Richard Weinberger" , "Rob Herring" , "Samuel Holland" , "Thomas Petazzoni" , "Tudor Ambarus" , "Vadivel Murugan" , "Vignesh Raghavendra" , "Xiangsheng Hou" Content-Transfer-Encoding: 7bit Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: On Tue, 6 Jun 2023 19:52:29 +0200, Miquel Raynal wrote: > As discussed with Krzysztof and Chris, it seems like each NAND > controller binding should actually restrain the properties allowed in > the NAND chip node with its own "unevaluatedProperties: false". This > only works if we reference a yaml schema which contains all the possible > properties *in the NAND chip node*. Indeed, the NAND controller yaml > > [ ... ] Acked-by: Maxime Ripard Reviewed-by: Maxime Ripard Tested-by: Maxime Ripard Thanks! Maxime