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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aba5339d94asm161583966b.143.2025.02.13.08.36.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 13 Feb 2025 08:36:26 -0800 (PST) Message-ID: <2bfaa1ce-0233-456d-ba2e-5b14533f3812@oss.qualcomm.com> Date: Thu, 13 Feb 2025 17:36:22 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] drm/msm/a6xx: Fix gpucc register block for A621 To: Akhil P Oommen , Rob Clark , Sean Paul , Konrad Dybcio , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Caleb Connolly Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jie Zhang References: <20250213-a623-gpu-support-v1-0-993c65c39fd2@quicinc.com> <20250213-a623-gpu-support-v1-1-993c65c39fd2@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250213-a623-gpu-support-v1-1-993c65c39fd2@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: PGRHOEGsH0gVfQBbyafsMroIXfLRz_I4 X-Proofpoint-ORIG-GUID: PGRHOEGsH0gVfQBbyafsMroIXfLRz_I4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-13_07,2025-02-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 mlxlogscore=807 phishscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 adultscore=0 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502130119 On 13.02.2025 5:10 PM, Akhil P Oommen wrote: > From: Jie Zhang > > Adreno 621 has a different memory map for GPUCC block. So update > a6xx_gpu_state code to dump the correct set of gpucc registers. > > Signed-off-by: Jie Zhang > Signed-off-by: Akhil P Oommen > --- So GPU_CC is outside what we consider GPU register region upstream.. And I've heard voices (+Caleb) lately that we should get some clock register dumping infrastructure.. So while I'm not against this patch fixing a bug, perhaps we can get rid of dumping GPU_CC here in the near future Konrad