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[81.167.86.93]) by smtp.gmail.com with ESMTPSA id h11-20020a0565123c8b00b0048a7d33e0f0sm447803lfv.261.2022.07.23.11.50.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 23 Jul 2022 11:50:06 -0700 (PDT) Message-ID: <2c11d0b0-b012-ea24-5c3c-305bbdd231a0@linaro.org> Date: Sat, 23 Jul 2022 20:50:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH v3 3/4] dt-bindings: irqchip: imx mu work as msi controller Content-Language: en-US To: Frank Li , jdmason@kudzu.us, maz@kernel.org, tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kw@linux.com, bhelgaas@google.com Cc: kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, peng.fan@nxp.com, aisheng.dong@nxp.com, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com, ntb@lists.linux.dev References: <20220720213036.1738628-1-Frank.Li@nxp.com> <20220720213036.1738628-4-Frank.Li@nxp.com> From: Krzysztof Kozlowski In-Reply-To: <20220720213036.1738628-4-Frank.Li@nxp.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 20/07/2022 23:30, Frank Li wrote: > imx mu support generate irq by write a register. > provide msi controller support so other driver > can use it by standard msi interface. Please start sentences with capital letter. Unfortunately I don't understand the sentences. Please describe shortly the hardware. > > Signed-off-by: Frank Li > --- > .../interrupt-controller/fsl,mu-msi.yaml | 88 +++++++++++++++++++ > 1 file changed, 88 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml > new file mode 100644 > index 0000000000000..e125294243af3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml > @@ -0,0 +1,88 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX Messaging Unit (MU) work as msi controller > + > +maintainers: > + - Frank Li > + > +description: | > + The Messaging Unit module enables two processors within the SoC to > + communicate and coordinate by passing messages (e.g. data, status > + and control) through the MU interface. The MU also provides the ability > + for one processor to signal the other processor using interrupts. > + > + Because the MU manages the messaging between processors, the MU uses > + different clocks (from each side of the different peripheral buses). > + Therefore, the MU must synchronize the accesses from one side to the > + other. The MU accomplishes synchronization using two sets of matching > + registers (Processor A-facing, Processor B-facing). > + > + MU can work as msi interrupt controller to do doorbell > + > +allOf: > + - $ref: /schemas/interrupt-controller/msi-controller.yaml# > + > +properties: > + compatible: > + enum: > + - fsl,imx6sx-mu-msi > + - fsl,imx7ulp-mu-msi > + - fsl,imx8ulp-mu-msi > + - fsl,imx8ulp-mu-msi-s4 > + > + reg: > + minItems: 2 Not minItems but maxItems in general, but anyway you need to actually list and describe the items (and then skip min/max) > + > + reg-names: > + items: > + - const: a > + - const: b > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + power-domains: > + maxItems: 2 and here you correctly use maxItems, so why min in reg? Anyway, instead you need to list and describe the items. Actually I asked you this last time about interrupts, so you ignored that comment. > + > + power-domain-names: > + items: > + - const: a > + - const: b > + > + interrupt-controller: true > + > + msi-controller: true > + > +required: > + - compatible > + - reg > + - interrupts > + - msi-controller > + - interrupt-controller Why different order than used in properties? Best regards, Krzysztof