* [PATCH] ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c
@ 2018-04-24 11:24 Amelie Delaunay
2018-05-03 7:50 ` Alexandre Torgue
0 siblings, 1 reply; 2+ messages in thread
From: Amelie Delaunay @ 2018-04-24 11:24 UTC (permalink / raw)
To: Maxime Coquelin, Alexandre Torgue, Rob Herring, Mark Rutland
Cc: linux-arm-kernel, devicetree, linux-kernel, Amelie Delaunay
Add support for USBH (USB Host) to STM32MP157C SoC.
USBH is a USB Host controller supporting the standard registers used for
full- and low-speed (OHCI controller) and high-speed (EHCI controller).
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index bc3eddc..cc06d6b 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -5,6 +5,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp1-clks.h>
+#include <dt-bindings/reset/stm32mp1-resets.h>
/ {
#address-cells = <1>;
@@ -167,6 +168,25 @@
#reset-cells = <1>;
};
+ usbh_ohci: usbh-ohci@5800c000 {
+ compatible = "generic-ohci";
+ reg = <0x5800c000 0x1000>;
+ clocks = <&rcc USBH>;
+ resets = <&rcc USBH_R>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ usbh_ehci: usbh-ehci@5800d000 {
+ compatible = "generic-ehci";
+ reg = <0x5800d000 0x1000>;
+ clocks = <&rcc USBH>;
+ resets = <&rcc USBH_R>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ companion = <&usbh_ohci>;
+ status = "disabled";
+ };
+
usart1: serial@5c000000 {
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c
2018-04-24 11:24 [PATCH] ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c Amelie Delaunay
@ 2018-05-03 7:50 ` Alexandre Torgue
0 siblings, 0 replies; 2+ messages in thread
From: Alexandre Torgue @ 2018-05-03 7:50 UTC (permalink / raw)
To: Amelie Delaunay, Maxime Coquelin, Rob Herring, Mark Rutland
Cc: linux-arm-kernel, devicetree, linux-kernel
Hi Amélie,
On 04/24/2018 01:24 PM, Amelie Delaunay wrote:
> Add support for USBH (USB Host) to STM32MP157C SoC.
> USBH is a USB Host controller supporting the standard registers used for
> full- and low-speed (OHCI controller) and high-speed (EHCI controller).
>
> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
> ---
> arch/arm/boot/dts/stm32mp157c.dtsi | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
> index bc3eddc..cc06d6b 100644
> --- a/arch/arm/boot/dts/stm32mp157c.dtsi
> +++ b/arch/arm/boot/dts/stm32mp157c.dtsi
> @@ -5,6 +5,7 @@
> */
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/stm32mp1-clks.h>
> +#include <dt-bindings/reset/stm32mp1-resets.h>
>
> / {
> #address-cells = <1>;
> @@ -167,6 +168,25 @@
> #reset-cells = <1>;
> };
>
> + usbh_ohci: usbh-ohci@5800c000 {
> + compatible = "generic-ohci";
> + reg = <0x5800c000 0x1000>;
> + clocks = <&rcc USBH>;
> + resets = <&rcc USBH_R>;
> + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + };
> +
> + usbh_ehci: usbh-ehci@5800d000 {
> + compatible = "generic-ehci";
> + reg = <0x5800d000 0x1000>;
> + clocks = <&rcc USBH>;
> + resets = <&rcc USBH_R>;
> + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> + companion = <&usbh_ohci>;
> + status = "disabled";
> + };
> +
> usart1: serial@5c000000 {
> compatible = "st,stm32h7-uart";
> reg = <0x5c000000 0x400>;
>
Applied on stm32-next.
Thanks.
Alex
^ permalink raw reply [flat|nested] 2+ messages in thread
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2018-05-03 7:50 ` Alexandre Torgue
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