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From: Robert Hancock <robert.hancock@calian.com>
To: "michal.simek@xilinx.com" <michal.simek@xilinx.com>,
	"andy.chiu@sifive.com" <andy.chiu@sifive.com>,
	"radhey.shyam.pandey@xilinx.com" <radhey.shyam.pandey@xilinx.com>
Cc: "andrew@lunn.ch" <andrew@lunn.ch>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"greentime.hu@sifive.com" <greentime.hu@sifive.com>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"pabeni@redhat.com" <pabeni@redhat.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"davem@davemloft.net" <davem@davemloft.net>
Subject: Re: [PATCH v4 4/4] net: axiemac: use a phandle to reference pcs_phy
Date: Mon, 21 Mar 2022 18:12:18 +0000	[thread overview]
Message-ID: <2ca86ca17ba694bf514cd66a68ff63e751caad7b.camel@calian.com> (raw)
In-Reply-To: <20220321152515.287119-4-andy.chiu@sifive.com>

On Mon, 2022-03-21 at 23:25 +0800, Andy Chiu wrote:
> In some SGMII use cases where both a fixed link external PHY and the
> internal PCS/PMA PHY need to be configured, we should explicitly use a
> phandle "pcs-phy" to get the reference to the PCS/PMA PHY. Otherwise, the
> driver would use "phy-handle" in the DT as the reference to both the
> external and the internal PCS/PMA PHY.
> 
> In other cases where the core is connected to a SFP cage, we could still
> point phy-handle to the intenal PCS/PMA PHY, and let the driver connect
> to the SFP module, if exist, via phylink.
> 
> Fixes: 1a02556086fc (net: axienet: Properly handle PCS/PMA PHY for 1000BaseX
> mode)
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
> ---
>  drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> index 496a9227e760..163753508464 100644
> --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> @@ -2071,9 +2071,16 @@ static int axienet_probe(struct platform_device *pdev)
>  
>  	if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII ||
>  	    lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) {
> -		np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
> +		np = of_parse_phandle(pdev->dev.of_node, "pcs-handle", 0);
>  		if (!np) {
> -			dev_err(&pdev->dev, "phy-handle required for
> 1000BaseX/SGMII\n");
> +			/* Deprecated: Always use "pcs-handle" for pcs_phy.
> +			 * Falling back to "phy-handle" here is only for
> +			 * backward compatibility with old device trees.
> +			 */
> +			np = of_parse_phandle(pdev->dev.of_node, "phy-handle",
> 0);
> +		}
> +		if (!np) {
> +			dev_err(&pdev->dev, "pcs-handle (preferred) or phy-
> handle required for 1000BaseX/SGMII\n");
>  			ret = -EINVAL;
>  			goto cleanup_mdio;
>  		}

Reviewed-by: Robert Hancock <robert.hancock@calian.com>

-- 
Robert Hancock
Senior Hardware Designer, Calian Advanced Technologies
www.calian.com

  reply	other threads:[~2022-03-21 18:12 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-21 15:25 [PATCH v4 1/4] net: axienet: setup mdio unconditionally Andy Chiu
2022-03-21 15:25 ` [PATCH v4 2/4] net: axienet: factor out phy_node in struct axienet_local Andy Chiu
2022-03-21 18:09   ` Robert Hancock
2022-03-21 15:25 ` [PATCH v4 3/4] dt-bindings: net: xilinx_axienet: add pcs-handle attribute Andy Chiu
2022-03-21 15:42   ` Radhey Shyam Pandey
2022-03-21 18:11     ` Robert Hancock
2022-03-21 23:44     ` Rob Herring
2022-03-21 23:56       ` Robert Hancock
2022-03-22  0:21       ` Andrew Lunn
2022-03-22 16:51         ` Rob Herring
2022-03-21 15:25 ` [PATCH v4 4/4] net: axiemac: use a phandle to reference pcs_phy Andy Chiu
2022-03-21 18:12   ` Robert Hancock [this message]
2022-03-21 18:08 ` [PATCH v4 1/4] net: axienet: setup mdio unconditionally Robert Hancock
2022-03-21 18:20 ` Andrew Lunn
2022-03-22  4:34   ` Andy Chiu

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