Re: [PATCH v2 2/2] i2c: exynos5: Add support for Exynos8895 SoC

[Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>]

On 12/26/24 00:59, Andi Shyti wrote:
> Hi Ivaylo,
>
> On Sat, Dec 21, 2024 at 05:19:37PM +0200, Ivaylo Ivanov wrote:
>> Exynos8895 functioning logic mostly follows I2C_TYPE_EXYNOS7, but timing
>> and temp calculations are slightly changed according to the following
> /changed/different/

Sure.

>
>> logic:
>>
>> FPCLK / FI2C = (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 2 *
>> ((FLT_CYCLE + 3) - (FLT_CYCLE + 3) % (CLK_DIV + 1))
>>
>> temp := (FPCLK / FI2C) - (FLT_CYCLE + 3) * 2
>>
> ...
>
>> @@ -352,11 +369,19 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings)
>>  	 *
>>  	 */
>>  	t_ftl_cycle = (readl(i2c->regs + HSI2C_CONF) >> 16) & 0x7;
>> -	temp = clkin / op_clk - 8 - t_ftl_cycle;
>> +	if (i2c->variant->hw == I2C_TYPE_EXYNOS8895)
>> +		temp = clkin / op_clk - (t_ftl_cycle + 3) * 2;
>> +	else
>> +		temp = clkin / op_clk - 8 - t_ftl_cycle;
>>  	if (i2c->variant->hw != I2C_TYPE_EXYNOS7)
>>  		temp -= t_ftl_cycle;
> Could you please make this:
>
> 	if (i2c->variant->hw == I2C_TYPE_EXYNOS8895)
> 		...
> 	else if (i2c->variant->hw == I2C_TYPE_EXYNOS7)
> 		...
> 	else
> 		...
>
> For a better clarity.

Alright. Will post a v3 soon.

Thanks!
Best regards, Ivo.

>
> Thanks,
> Andi