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Sun, 02 Aug 2026 06:53:45 -0700 (PDT) X-Received: by 2002:a05:620a:2252:10b0:930:adff:9aa1 with SMTP id af79cd13be357-934a078753bmr981845185a.13.1785678824938; Sun, 02 Aug 2026 06:53:44 -0700 (PDT) Received: from [192.168.1.73] ([92.247.57.178]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c1fd3c5b0fasm438716966b.5.2026.08.02.06.53.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 02 Aug 2026 06:53:44 -0700 (PDT) Message-ID: <2d7cafb1-acd3-4be6-9fdd-3071a55a7b08@oss.qualcomm.com> Date: Sun, 2 Aug 2026 16:53:41 +0300 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 1/3] dt-bindings: media: qcom: Add JPEG encoder binding To: Loic Poulain , "Gjorgji Rosikopulos (Consultant)" Cc: Dmitry Baryshkov , linux-media@vger.kernel.org, bod@kernel.org, mchehab@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org, loic.poulain@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260730150524.2659577-1-atanas.filipov@oss.qualcomm.com> <20260730150524.2659577-2-atanas.filipov@oss.qualcomm.com> <3cbnmjmit4gsldga5nzct4odg6hpixzlwxbj72elnogyevr2tg@6esyjj2mvyom> Content-Language: en-US From: Atanas Filipov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: bfS1OkLL447mMJqEK1wsyVa_GmSWvlSg X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODAyMDEyMyBTYWx0ZWRfX73nGsIC+x7p2 vsHFeV43pUz1XqRj0PopZFKk3mXq8Lm/6rkFIEna4nGvg7y9uXeBYs+uSI1U/J0Am3IQzXmQos3 cDT0sU3n+dK++QI44thM5ENZqZ3XMR/Rs8CAESu7n+jcbT88sVQ/V2khQzqVbOXOBJS4pFAUCL+ pKEmoI4MnkZedFWQJjvAmVmeOmxrY6sL+abxniG0b4ARSufcRIrMnT2doZVBOTaF8+sECQxFd24 dewRTmOJmwZBuzzhoLDm2WrnCsMXaWyB2dBTKGiERlVUIN2Q7xyp/a166nzOUjqAqXUv1tUk9i5 qOYD1QLJuxrbOmhrdeDcW/eOAZYQqj2Hpp5Ri3dH3DKWW+C7mTTnexS0dQioi7OYfNcFgdgLS/u OuIvdJ/pXAT06DCftzfMkHXsNf3CVPiUlHIzmAfeCQGXLOgNMDn8w1BVvwN608vQok7NRVb1Oxe fHI6lY99B7xVikppLuQ== X-Authority-Analysis: v=2.4 cv=LsCiDHdc c=1 sm=1 tr=0 ts=6a6f4bea cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=ybD9qRDIDfZaXNPQ7Ca20A==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=gEfo2CItAAAA:8 a=D19gQVrFAAAA:8 a=EUspDBNiAAAA:8 a=DArUqyWxf9ZkW7bf0ckA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 a=sptkURWiP4Gy88Gu7hUp:22 a=W4TVW4IDbPiebHqcZpNg:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODAyMDEyMyBTYWx0ZWRfX+WJdjGXS7Amc iWPxbbkcVZsIV3cqJLf5e8uRundvdRkVzXwbbL+o/BXpf8vbYC1gAGUudDDRxFHOdn5g9lsUxNc rZcztEpYBi6ntmI5BMiK9gQfKQZLwlk= X-Proofpoint-ORIG-GUID: bfS1OkLL447mMJqEK1wsyVa_GmSWvlSg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-02_04,2026-07-30_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 phishscore=0 spamscore=0 adultscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 bulkscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608020123 On 8/1/2026 10:48 PM, Loic Poulain wrote: > On Fri, Jul 31, 2026 at 9:27 PM Gjorgji Rosikopulos (Consultant) > wrote: >> >> Hi Dmitry, Atanas, >> >> On 7/30/2026 7:24 PM, Atanas Filipov wrote: >>> On 7/30/2026 6:39 PM, Dmitry Baryshkov wrote: >>>> On Thu, Jul 30, 2026 at 06:05:22PM +0300, Atanas Filipov wrote: >>>>> Add device-tree binding for the Qualcomm JPEG encoder hardware block >>>>> present in SM8250 (Kona) SoCs. >>>>> >>>>> The JPEG encoder is a standalone hardware IP within the camera subsystem >>>>> that performs JPEG compression in memory-to-memory fashion. It is >>>>> separate from the CAMSS ISP pipeline and has its own register space, >>>>> interrupt, clocks, power domain, IOMMU streams, and interconnect paths. >>>>> >>>>> Signed-off-by: Atanas Filipov >>>>> --- >>>>> .../bindings/media/qcom,sm8250-jpeg-enc.yaml | 156 ++++++++++++++++++ >>>>> 1 file changed, 156 insertions(+) >>>>> create mode 100644 Documentation/devicetree/bindings/media/qcom,sm8250-jpeg-enc.yaml >>>>> >>>>> diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-jpeg-enc.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-jpeg-enc.yaml >>>>> new file mode 100644 >>>>> index 000000000000..70f573100573 >>>>> --- /dev/null >>>>> +++ b/Documentation/devicetree/bindings/media/qcom,sm8250-jpeg-enc.yaml >>>>> @@ -0,0 +1,156 @@ >>>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >>>>> +%YAML 1.2 >>>>> +--- >>>>> +$id: http://devicetree.org/schemas/media/qcom,sm8250-jpeg-enc.yaml# >>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>>>> + >>>>> +title: Qualcomm JPEG Encoder >>>>> + >>>>> +maintainers: >>>>> + - Atanas Filipov >>>>> + >>>>> +description: >>>>> + Qualcomm JPEG Encoder is the JPEG encode hardware present in Qualcomm SoCs. >>>>> + The encoder is a standalone hardware IP within the camera subsystem that >>>>> + performs JPEG compression in memory-to-memory fashion. >>>>> + >>>>> +properties: >>>>> + compatible: >>>>> + enum: >>>>> + - qcom,sm8250-jpeg-enc >>>>> + >>>>> + reg: >>>>> + maxItems: 1 >>>>> + >>>>> + interrupts: >>>>> + maxItems: 1 >>>>> + >>>>> + clocks: >>>>> + maxItems: 5 >>>>> + >>>>> + clock-names: >>>>> + items: >>>>> + - const: sf_axi >>>>> + - const: core_ahb >>>>> + - const: cpas_ahb >>>>> + - const: cnoc_axi >>>>> + - const: jpeg >>>>> + >>>>> + power-domains: >>>>> + maxItems: 3 >>>>> + >>>>> + power-domain-names: >>>>> + items: >>>>> + - const: titan_top >>>>> + - const: mmcx >>>>> + - const: mx >>>>> + >>>>> + interconnects: >>>>> + maxItems: 2 >>>>> + >>>>> + interconnect-names: >>>>> + items: >>>>> + - const: cpu-cfg >>>>> + - const: sf-mnoc >>>>> + >>>>> + iommus: >>>>> + description: >>>>> + SMMU stream ID for the JPEG hardware. The stream ID 0x2040 is used >>>>> + for the JPEG core engine on SM8250. >>>>> + maxItems: 1 >>>>> + >>>>> + operating-points-v2: true >>>>> + >>>>> + opp-table: >>>>> + type: object >>>>> + >>>>> +required: >>>>> + - compatible >>>>> + - reg >>>>> + - clocks >>>>> + - clock-names >>>>> + - interrupts >>>>> + - power-domains >>>>> + - power-domain-names >>>>> + - interconnects >>>>> + - interconnect-names >>>>> + - iommus >>>>> + >>>>> +additionalProperties: false >>>>> + >>>>> +examples: >>>>> + - | >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + >>>>> + jpeg-encoder@ac53000 { >>>>> + compatible = "qcom,sm8250-jpeg-enc"; >>>>> + reg = <0x0ac53000 0x1000>; >>>>> + >>>>> + interrupts = ; >>>>> + >>>>> + power-domains = <&camcc TITAN_TOP_GDSC>, >>>>> + <&rpmhpd RPMHPD_MMCX>, >>>>> + <&rpmhpd RPMHPD_MX>; >>>>> + power-domain-names = "titan_top", "mmcx", "mx"; >>>>> + >>>>> + clocks = <&gcc GCC_CAMERA_SF_AXI_CLK>, >>>>> + <&camcc CAM_CC_CORE_AHB_CLK>, >>>>> + <&camcc CAM_CC_CPAS_AHB_CLK>, >>>>> + <&camcc CAM_CC_CAMNOC_AXI_CLK>, >>>>> + <&camcc CAM_CC_JPEG_CLK>; >>>>> + clock-names = "sf_axi", >>>>> + "core_ahb", >>>>> + "cpas_ahb", >>>>> + "cnoc_axi", >>>>> + "jpeg"; >>>> >>>> What are the pin input names for these clocks on the JPEG side? Can we >>>> use a better name? >> >> The name of the the clock on jpeg side(based on documentation we have) is >> cam_cc_jpeg_clk, There was comment from Krzysztof "https://lkml.org/lkml/2026/5/15/1112" >> to drop cam and clk, so it remains cc_jpeg or only jpeg. >> >> As i can see in ope patches ope_clk is named as "core", do we have some general >> guidance how to name those clocks? or if you have any preference or proposal it will >> be included in next patchset. > > In ope series I named the clocks based on OPE block PoV ant its > function, so usually the main function clock (the one you named jpeg > above) is the 'core' clock, the AHB is usually for clocking the > 'config' bus and the axi one is usually for the actual 'data' bus. > IMO, it's clearer like that. > Thank you for the feedback. I'll make the necessary changes in next version. >>>> >>> >>> In my opinion, there is no such thing as a better name; the only >>> important thing is that it matches the HW documentation. As can be seen >>> from the clock names in the FW shown above. So, could you be more >>> specific about which names you would like to see used here? >>> >>> Regards, >>> Atanas >>> >>>>> + >>>>> + interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY >>>>> + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, >>>>> + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS >>>>> + &mc_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>; >>>>> + interconnect-names = "cpu-cfg", >>>>> + "sf-mnoc"; >>>>> + >>>>> + iommus = <&apps_smmu 0x2040 0x400>; >>>>> + >>>>> + operating-points-v2 = <&jpeg_opp_table>; >>>>> + >>>>> + jpeg_opp_table: opp-table { >>>>> + compatible = "operating-points-v2"; >>>>> + >>>>> + opp-100000000 { >>>>> + opp-hz = /bits/ 64 <400000000>, >>>>> + /bits/ 64 <100000000>; >>>> >>>> So, you've identified the issue earlier. The shared clocks need to be >>>> scaled, taking all users in account. Please come up with the solution >>>> too. >> >> One proposal is to have camnoc icc clock provider, there is implementation >> available and it will be posted, What is the preference to have different >> patchset or to have camnoc icc provider as part of this patchset new version? >> >> Regards, >> ~Gjorgji >> >> >> >>