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AJvYcCUx0qYiOSCUlucjdiLDb/tVKSyqy42RA5kMr8CdNKkYr6/vph1xP4o0Hqsdab6sR+jqtxPPKGmMEeHXLRYVqDs/CkiiMkTH2uMseg== X-Gm-Message-State: AOJu0YxY6DlGJxCImCrTSHooheZhO7SqIUMTsFSy/eYTtQJ91sKCbbMV 6e/dE2sYnLZYbdA06D4epHlH4LxxR5H/ZKUKycgFzSpTUkow1uPVg/Rzt9AIRwQ= X-Google-Smtp-Source: AGHT+IGUUgr6cBEnD2tCmXSr4pwM67vErUoxFoA+3T6ptqYl/6tb8BTV9jUL9ZHzS76Rs6JqQBzW8w== X-Received: by 2002:a5d:5f49:0:b0:341:a63a:d253 with SMTP id cm9-20020a5d5f49000000b00341a63ad253mr4914259wrb.53.1711882216232; Sun, 31 Mar 2024 03:50:16 -0700 (PDT) Received: from [192.168.1.20] ([178.197.223.16]) by smtp.gmail.com with ESMTPSA id b14-20020adff90e000000b0033e745b8bcfsm8629606wrr.88.2024.03.31.03.50.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 31 Mar 2024 03:50:15 -0700 (PDT) Message-ID: <2d938d7d-74a3-43af-9de3-c8f584826d32@linaro.org> Date: Sun, 31 Mar 2024 12:50:14 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] spi: cadence: Add Marvell IP modification changes To: Witold Sadowski , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org Cc: broonie@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, pthombar@cadence.com References: <20240329194849.25554-1-wsadowski@marvell.com> <20240329194849.25554-3-wsadowski@marvell.com> Content-Language: en-US From: Krzysztof Kozlowski Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 29/03/2024 20:48, Witold Sadowski wrote: > Add support for Marvell IP modification - clock divider, > and PHY config, and IRQ clearing. > Clock divider block is build into Cadence XSPI controller > and is connected directly to 800MHz clock. > As PHY config is not set directly in IP block, driver can > load custom PHY configuration values. > To correctly clear interrupt in Marvell implementation > MSI-X must be cleared too. > > Signed-off-by: Witold Sadowski > --- > drivers/spi/spi-cadence-xspi.c | 311 ++++++++++++++++++++++++++++++++- You already sent this patchset, so this is not v1. Please version your patches correctly. b4 does it automatically. You also received last time feedback which it seems you just ignored. You did not respond to any of the feedback and I do not see it being addressed here. That's not how collaboration in upstream projects work. Don't just ignore reviews you receive. Please carefully read: https://elixir.bootlin.com/linux/v6.9-rc1/source/Documentation/process/submitting-patches.rst There is also entire section about this particular issue - responding to reviewers. Best regards, Krzysztof