From: "Stanley Chang[昌育德]" <stanley_chang@realtek.com>
To: Chanwoo Choi <chanwoo@kernel.org>,
MyungJoo Ham <myungjoo.ham@samsung.com>
Cc: Chanwoo Choi <cw00.choi@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: RE: [PATCH v1 1/2] extcon: add Realtek DHC RTD SoC Type-C driver
Date: Tue, 29 Aug 2023 11:15:49 +0000 [thread overview]
Message-ID: <2df3dc449c894e50b126a1b6941eb4d7@realtek.com> (raw)
In-Reply-To: <af247603-6a8d-7c05-4342-c6f615a7f508@kernel.org>
Hi Chanwoo,
> > +static int rtd129x_switch_type_c_plug_config(struct type_c_data *type_c,
> > + int dr_mode, int cc)
> > +{
> > + void __iomem *reg = type_c->reg_base + USB_TYPEC_CTRL_CC1_0;
> > + int val_cc;
> > +
> > +#define TYPE_C_EN_SWITCH BIT(29)
> > +#define TYPE_C_TXRX_SEL (BIT(28) | BIT(27))
> > +#define TYPE_C_SWITCH_MASK (TYPE_C_EN_SWITCH | TYPE_C_TXRX_SEL)
> > +#define TYPE_C_ENABLE_CC1 TYPE_C_EN_SWITCH
> > +#define TYPE_C_ENABLE_CC2 (TYPE_C_EN_SWITCH | TYPE_C_TXRX_SEL)
> > +#define TYPE_C_DISABLE_CC ~TYPE_C_SWITCH_MASK
> > +
> > + val_cc = readl(reg);
>
> I'd like you to use regmap interface to access the register
> by using regmap_read, regmap_write. You can create the regmap instance
> via devm_regmap_init_mmio() on probe instead of using 'type_c->reg_base'
> at the multipe point.
>
> For example,
> struct regmap_config rtk_regmap_config = {
> .reg_bits = 32,
> .val_bits = 32,
> };
>
> void __iomem *base;
>
> base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
> if (IS_ERR(base))
> return PTR_ERR(base);
>
> regmap = devm_regmap_init_mmio(dev, base,
> &rtk_regmap_config);
>
> ---
>
> And then just call regmap_read without any calculation between
> base address and specific register.
>
> regmap_read(regmap, USB_TYPEC_CTRL_CC1_0)
>
I studied mmio's regmap.
It only changed one encoding method. And simplifies the calculation between the base address and the specific register.
If the register is 32-bit aligned, other operations look the same as readl/writel.
I think regmap is more simplified if the read registers are not 32-bit aligned, e.g. nvmem read/write.
So it would be more intuitive for me to keep writel/readl here
>
> > + val_cc &= ~TYPE_C_SWITCH_MASK;
> > +
> > + if (cc == DISABLE_CC) {
> > + val_cc &= TYPE_C_DISABLE_CC;
> > + } else if (cc == ENABLE_CC1) {
> > + val_cc |= TYPE_C_ENABLE_CC1;
> > + } else if (cc == ENABLE_CC2) {
> > + val_cc |= TYPE_C_ENABLE_CC2;
> > + } else {
> > + dev_err(type_c->dev, "%s: Error cc setting cc=0x%x\n",
> __func__, cc);
> > + return -EINVAL;
> > + }
> > + writel(val_cc, reg);
> > +
Thanks,
Stanley
next prev parent reply other threads:[~2023-08-29 11:17 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-22 10:28 [PATCH v1 1/2] extcon: add Realtek DHC RTD SoC Type-C driver Stanley Chang
2023-08-22 10:28 ` [PATCH v1 2/2] dt-bindings: extcon: Add Realtek DHC RTD SoC Type-C Stanley Chang
2023-08-22 15:38 ` Krzysztof Kozlowski
2023-08-24 6:03 ` Stanley Chang[昌育德]
2023-08-24 6:26 ` Krzysztof Kozlowski
2023-08-24 7:23 ` Stanley Chang[昌育德]
2023-08-24 8:43 ` Krzysztof Kozlowski
2023-08-24 9:23 ` Stanley Chang[昌育德]
2023-08-24 9:56 ` Krzysztof Kozlowski
2023-08-24 10:05 ` Stanley Chang[昌育德]
2023-08-22 15:35 ` [PATCH v1 1/2] extcon: add Realtek DHC RTD SoC Type-C driver Krzysztof Kozlowski
2023-08-24 6:09 ` Stanley Chang[昌育德]
2023-08-23 0:26 ` kernel test robot
2023-08-23 14:15 ` kernel test robot
2023-08-24 19:43 ` Chanwoo Choi
2023-08-25 9:39 ` Stanley Chang[昌育德]
2023-08-29 11:15 ` Stanley Chang[昌育德] [this message]
2023-08-29 19:18 ` Chanwoo Choi
2023-08-30 3:59 ` Stanley Chang[昌育德]
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