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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Neeraj Soni <neeraj.soni@oss.qualcomm.com>,
	ulf.hansson@linaro.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, andersson@kernel.org,
	konradybcio@kernel.org
Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Abel Vesa <abel.vesa@linaro.org>,
	Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
Subject: Re: [PATCH v3 1/2] dt-bindings: mmc: sdhci-msm: Add ICE phandle
Date: Mon, 16 Feb 2026 12:08:28 +0100	[thread overview]
Message-ID: <2e212989-5976-4ac0-a86a-01414ca856f5@kernel.org> (raw)
In-Reply-To: <640e2eca-1656-1723-38e8-d6cd97e6e2e3@oss.qualcomm.com>

On 16/02/2026 12:05, Neeraj Soni wrote:
> 
> 
> On 2/6/2026 4:56 PM, Krzysztof Kozlowski wrote:
>> On 06/02/2026 12:20, Neeraj Soni wrote:
>>> Starting with sc7280(kodiak), the ICE will have its own device-tree node.
>>> So add the qcom,ice property to reference it.
>>>
>>> Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
>>> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
>>> Co-developed-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
>>> Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
>>> Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
>>>
>>> ---
>>>
>>> Some initial work is done by Abel here:
>>> https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/
>>> and by Abhinaba here:
>>> https://lore.kernel.org/all/20251009-add-separate-ice-ufs-and-emmc-device-nodes-for-qcs615-platform-v1-1-2a34d8d03c72@oss.qualcomm.com/
>>>
>>> This patch adds the purpose and usage for phandle in the description and encodes
>>> it properly in the schema.
>>> ---
>>>  .../devicetree/bindings/mmc/sdhci-msm.yaml    | 26 +++++++++++++++++++
>>>  1 file changed, 26 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>>> index 938be8228d66..f35b675c9f16 100644
>>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>>> @@ -140,6 +140,12 @@ properties:
>>>      $ref: /schemas/types.yaml#/definitions/uint32
>>>      description: platform specific settings for DLL_CONFIG reg.
>>>  
>>> +  qcom,ice:
>>> +    $ref: /schemas/types.yaml#/definitions/phandle
>>> +    description: |
>>> +      phandle to the Inline Crypto Engine node. ICE having its own platform driver will use this phandle to
>>
>> Please wrap code according to the preferred limit expressed in Kernel
>> coding style (checkpatch is not a coding style description, but only a
>> tool).  However don't wrap blindly (see Kernel coding style).
>>
> Sure. While executing dt_binding_check the tool reported max limit as 110 characters so i wrapped
> around it. I will consolidate the description to single line in next patch.

Can you read Linux kernel coding style as I asked?

Best regards,
Krzysztof

  reply	other threads:[~2026-02-16 11:08 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-06 11:20 [PATCH v3 0/2] Enable Inline crypto engine for kodiak Neeraj Soni
2026-02-06 11:20 ` [PATCH v3 1/2] dt-bindings: mmc: sdhci-msm: Add ICE phandle Neeraj Soni
2026-02-06 11:26   ` Krzysztof Kozlowski
2026-02-16 11:05     ` Neeraj Soni
2026-02-16 11:08       ` Krzysztof Kozlowski [this message]
2026-02-06 11:20 ` [PATCH v3 2/2] arm64: dts: qcom: kodiak: enable the inline crypto engine for SDHC Neeraj Soni

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