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Shutemov" References: <20240829010151.2813377-1-samuel.holland@sifive.com> <20240829010151.2813377-7-samuel.holland@sifive.com> Content-Language: en-US From: Samuel Holland In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Charlie, On 2024-09-12 9:51 PM, Charlie Jenkins wrote: > On Wed, Aug 28, 2024 at 06:01:28PM -0700, Samuel Holland wrote: >> This allows a tracer to control the ABI of the tracee, as on arm64. >> >> Signed-off-by: Samuel Holland >> --- > > Since this code is identical to the arm64 port, could it be extracted > out into the generic ptrace.c and ifdef on either CONFIG_RISCV_ISA_SUPM > or CONFIG_ARM64_TAGGED_ADDR_ABI by adding some generic flag like > CONFIG_HAVE_ARCH_TAGGED_ADDR_ABI? Yes, it could be factored out, though I don't know if it is worth the overhead for these two trivial functions. I don't see any other code like this outside of arch/. Regards, Samuel >> >> (no changes since v1) >> >> arch/riscv/kernel/ptrace.c | 42 ++++++++++++++++++++++++++++++++++++++ >> include/uapi/linux/elf.h | 1 + >> 2 files changed, 43 insertions(+) >> >> diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c >> index 92731ff8c79a..ea67e9fb7a58 100644 >> --- a/arch/riscv/kernel/ptrace.c >> +++ b/arch/riscv/kernel/ptrace.c >> @@ -28,6 +28,9 @@ enum riscv_regset { >> #ifdef CONFIG_RISCV_ISA_V >> REGSET_V, >> #endif >> +#ifdef CONFIG_RISCV_ISA_SUPM >> + REGSET_TAGGED_ADDR_CTRL, >> +#endif >> }; >> >> static int riscv_gpr_get(struct task_struct *target, >> @@ -152,6 +155,35 @@ static int riscv_vr_set(struct task_struct *target, >> } >> #endif >> >> +#ifdef CONFIG_RISCV_ISA_SUPM >> +static int tagged_addr_ctrl_get(struct task_struct *target, >> + const struct user_regset *regset, >> + struct membuf to) >> +{ >> + long ctrl = get_tagged_addr_ctrl(target); >> + >> + if (IS_ERR_VALUE(ctrl)) >> + return ctrl; >> + >> + return membuf_write(&to, &ctrl, sizeof(ctrl)); >> +} >> + >> +static int tagged_addr_ctrl_set(struct task_struct *target, >> + const struct user_regset *regset, >> + unsigned int pos, unsigned int count, >> + const void *kbuf, const void __user *ubuf) >> +{ >> + int ret; >> + long ctrl; >> + >> + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1); >> + if (ret) >> + return ret; >> + >> + return set_tagged_addr_ctrl(target, ctrl); >> +} >> +#endif >> + >> static const struct user_regset riscv_user_regset[] = { >> [REGSET_X] = { >> .core_note_type = NT_PRSTATUS, >> @@ -182,6 +214,16 @@ static const struct user_regset riscv_user_regset[] = { >> .set = riscv_vr_set, >> }, >> #endif >> +#ifdef CONFIG_RISCV_ISA_SUPM >> + [REGSET_TAGGED_ADDR_CTRL] = { >> + .core_note_type = NT_RISCV_TAGGED_ADDR_CTRL, >> + .n = 1, >> + .size = sizeof(long), >> + .align = sizeof(long), >> + .regset_get = tagged_addr_ctrl_get, >> + .set = tagged_addr_ctrl_set, >> + }, >> +#endif >> }; >> >> static const struct user_regset_view riscv_user_native_view = { >> diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h >> index b54b313bcf07..9a32532d7264 100644 >> --- a/include/uapi/linux/elf.h >> +++ b/include/uapi/linux/elf.h >> @@ -448,6 +448,7 @@ typedef struct elf64_shdr { >> #define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */ >> #define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ >> #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ >> +#define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */ >> #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ >> #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */ >> #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */ >> -- >> 2.45.1 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv