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([2a01:e0a:982:cbb0:f04:f84b:d87d:1d06]) by smtp.gmail.com with ESMTPSA id t14-20020a05600c450e00b003fee567235bsm17489914wmo.1.2023.11.20.01.55.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 20 Nov 2023 01:55:43 -0800 (PST) Message-ID: <2e7a65da-5c1d-4dd4-ac69-7559a53afdf3@linaro.org> Date: Mon, 20 Nov 2023 10:55:41 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: neil.armstrong@linaro.org Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH v2 2/6] dt-bindings: pwm: amlogic: add new compatible for meson8 pwm type Content-Language: en-US, fr To: Jerome Brunet Cc: Rob Herring , JunYi Zhao , devicetree@vger.kernel.org, Rob Herring , Conor Dooley , Kevin Hilman , Thierry Reding , linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, linux-amlogic@lists.infradead.org, Krzysztof Kozlowski References: <20231117125919.1696980-1-jbrunet@baylibre.com> <20231117125919.1696980-3-jbrunet@baylibre.com> <170040994064.269288.960284011884896046.robh@kernel.org> <4608012c-059f-4d6a-914b-e85ad0c32ff0@linaro.org> <1j5y1wg3sb.fsf@starbuckisacylon.baylibre.com> Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro Developer Services In-Reply-To: <1j5y1wg3sb.fsf@starbuckisacylon.baylibre.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Jerome, On 20/11/2023 10:18, Jerome Brunet wrote: > > On Mon 20 Nov 2023 at 09:27, Neil Armstrong wrote: > >> Hi Rob, >> >> On 19/11/2023 17:05, Rob Herring wrote: >>> On Fri, 17 Nov 2023 13:59:12 +0100, Jerome Brunet wrote: >>>> Add a new compatible for the pwm found in the meson8 to sm1 Amlogic SoCs. >>>> >>>> The previous clock bindings for these SoCs described the driver and not the >>>> HW itself. The clock provided was used to set the parent of the input clock >>>> mux among the possible parents hard-coded in the driver. >>>> >>>> The new bindings allows to describe the actual clock inputs of the PWM in >>>> DT, like most bindings do, instead of relying of hard-coded data. >>>> >>>> The new bindings make the old one deprecated. >>>> >>>> There is enough experience on this HW to know that the PWM is exactly the >>>> same all the supported SoCs. There is no need for a per-SoC compatible. >>>> >>>> Signed-off-by: Jerome Brunet >>>> --- >>>> .../devicetree/bindings/pwm/pwm-amlogic.yaml | 36 +++++++++++++++++-- >>>> 1 file changed, 34 insertions(+), 2 deletions(-) >>>> >>> Reviewed-by: Rob Herring >>> >> >> I'm puzzled, isn't it recommended to have a per-soc compatible now ? > > I have specifically addressed this matter in the description, > haven't I ? What good would it do in this case ? Yes you did but I was asked for the last year+ that all new compatible should be soc specific (while imprecise, in our care soc family should be ok), with a possible semi-generic callback with an IP version or a first soc implementing the IP. > > Plus the definition of a SoC is very vague. One could argue that > the content of the list bellow are vaguely defined families. Should we > add meson8b, gxl, gxm, sm1 ? ... or even the actual SoC reference ? > This list gets huge for no reason. I think in our case soc family is reasonable since they share same silicon design. > > We know all existing PWM of this type are the same. We have been using > them for years. It is not a new support we know nothing about. > >> >> I thought something like: >> - items: >> - enum: >> - amlogic,gxbb-pwm >> - amlogic,axg-pwm >> - amlogic,g12a-pwm >> - const: amlogic,pwm-v1 > > I'm not sure I understand what you are suggesting here. > Adding a "amlogic,pwm-v1" for the obsolete compatible ? No amlogic DT > has that and I'm working to remove this type, so I don't get the point. > >> >> should be preferred instead of a single amlogic,meson8-pwm-v2 ? > > This is named after the first SoC supporting the type. > > Naming it amlogic,pwm-v2 would feel weird with the s4 coming after. > Plus the doc specifically advise against this type of names. The -v2 refers to a pure software/dt implementation versioning and not an HW version, so I'm puzzled and I requires DT maintainers advice here. Yes meson8b is the first "known" platform, even if I'm pretty sure meson6 has the same pwm architecture, this is why "amlogic,pwm-v1" as fallback seems more reasonable and s4 and later pwm could use the "amlogic,pwm-v2" fallback. Neil > >> >> Neil >