Re: [PATCH v5 1/4] arm64: dts: lx2160a: describe the SerDes block #2

[Josua Mayer <josua@solid-run.com>]

Hello everyone,

This is one of the patches in my series that hasn't received any 
feedback yet ...
(apart from Krzysztof correctly pointing out commit a description 
formatting mistake).

Please note that I intend on changing the new serdes_2 node to add 
status disabled by default.
Since the lynx-28g driver currently only supports network protocols,
enabling it by default could interfere with configurations using those 
SerDes's as PCI.

Am 18.08.23 um 13:10 schrieb Josua Mayer:
> Add description for the LX2160A second SerDes block.
> It is functionally identical to the first one already added in
> commit 3cbe93a1f540 ("arch: arm64: dts: lx2160a: describe the SerDes
> block #1").
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---
> V4 -> V5: expand commit hash reference in commit message
>
>   arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index ea6a94b57aeb..2e68c05181dd 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -626,6 +626,12 @@ serdes_1: phy@1ea0000 {
>   			#phy-cells = <1>;
>   		};
>   
> +		serdes_2: phy@1eb0000 {
> +			compatible = "fsl,lynx-28g";
> +			reg = <0x0 0x1eb0000 0x0 0x1e30>;
> +			#phy-cells = <1>;
> +		};
> +
>   		crypto: crypto@8000000 {
>   			compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
>   			fsl,sec-era = <10>;
- Josua Mayer