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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: george.moussalem@outlook.com,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Luo Jie <quic_luoj@quicinc.com>, Lee Jones <lee@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 6/6] arm64: dts: qcom: Update IPQ5018 xo_board_clk to use fixed factor clock
Date: Fri, 2 May 2025 12:39:09 +0200	[thread overview]
Message-ID: <2f5d9be9-8eff-46c9-9316-be2c539303ac@oss.qualcomm.com> (raw)
In-Reply-To: <20250502-ipq5018-cmn-pll-v1-6-27902c1c4071@outlook.com>

On 5/2/25 12:15 PM, George Moussalem via B4 Relay wrote:
> From: George Moussalem <george.moussalem@outlook.com>
> 
> The xo_board_clk is fixed to 24 MHZ, which is routed from WiFi output
> clock 96 MHZ (also being the reference clock of CMN PLL) divided by 4
> to the analog block routing channel.
> 
> Signed-off-by: George Moussalem <george.moussalem@outlook.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

  reply	other threads:[~2025-05-02 10:39 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-02 10:15 [PATCH 0/6] Add CMN PLL clock controller support for IPQ5018 George Moussalem via B4 Relay
2025-05-02 10:15 ` [PATCH 1/6] dt-bindings: clock: qcom: Add CMN PLL support for IPQ5018 SoC George Moussalem via B4 Relay
2025-05-02 11:35   ` Rob Herring (Arm)
2025-05-02 14:17   ` Rob Herring
2025-05-02 16:14     ` George Moussalem
2025-05-04  1:49   ` Jie Luo
2025-05-04  7:03     ` George Moussalem
2025-05-05  2:55       ` Jie Luo
2025-05-02 10:15 ` [PATCH 2/6] clk: qcom: ipq5018: mark XO clock as critical George Moussalem via B4 Relay
2025-05-02 10:29   ` Konrad Dybcio
2025-05-02 12:45     ` George Moussalem
     [not found]     ` <b05d9351-cc79-4e60-a6e0-de2fe698098f@outlook.com>
2025-05-04  6:59       ` George Moussalem
2025-05-06  0:59         ` Konrad Dybcio
2025-05-02 10:15 ` [PATCH 3/6] clk: qcom: ipq-cmn-pll: Add IPQ5018 SoC support George Moussalem via B4 Relay
2025-05-02 10:38   ` Konrad Dybcio
2025-05-02 13:04     ` George Moussalem
2025-05-02 10:15 ` [PATCH 4/6] dt-bindings: mfd: qcom,tcsr: Add compatible for IPQ5018 George Moussalem via B4 Relay
2025-05-09 22:05   ` Rob Herring (Arm)
2025-05-02 10:15 ` [PATCH 5/6] arm64: dts: ipq5018: Add CMN PLL node George Moussalem via B4 Relay
2025-05-04  1:53   ` Jie Luo
2025-05-04  7:10     ` George Moussalem
2025-05-02 10:15 ` [PATCH 6/6] arm64: dts: qcom: Update IPQ5018 xo_board_clk to use fixed factor clock George Moussalem via B4 Relay
2025-05-02 10:39   ` Konrad Dybcio [this message]
2025-05-02 14:45   ` Dmitry Baryshkov
2025-05-02 15:53     ` George Moussalem
2025-05-04  2:17       ` Jie Luo
2025-05-04  7:14         ` George Moussalem
2025-05-02 19:31 ` [PATCH 0/6] Add CMN PLL clock controller support for IPQ5018 Rob Herring (Arm)

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