From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexandre Torgue Subject: Re: [PATCH 2/2] pinctrl: stm32: check node status before new gpio bank registering Date: Mon, 30 Jul 2018 17:31:22 +0200 Message-ID: <2f76dbc9-16f1-ddb6-be11-bf0c383b83c6@st.com> References: <1531745857-5561-1-git-send-email-alexandre.torgue@st.com> <1531745857-5561-3-git-send-email-alexandre.torgue@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Linus Walleij Cc: Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Amelie Delaunay , "linux-kernel@vger.kernel.org" , "open list:GPIO SUBSYSTEM" , Rob Herring , Maxime Coquelin , Linux ARM List-Id: devicetree@vger.kernel.org Hi Linus On 07/29/2018 10:11 PM, Linus Walleij wrote: > On Mon, Jul 16, 2018 at 2:57 PM Alexandre Torgue > wrote: > >> Register a new GPIO bank only if GPIO bank node is enabled. This patch also >> adds checks on ranges which are defined only if a bank is registered. >> >> Signed-off-by: Alexandre Torgue > > Patch applied. > Thanks > Alexandre can you check the discussion we've had about using > GPIOLIB_IRQCHIP for multi-bank GPIOs with several IRQ > lines as per drivers/gpio/gpio-tegra186.c? > > Is this approach applicable for STM32 so we can pull > more stuff in under GPIOLIB_IRQCHIP? > Ok. I'm going to check what's possible to do. I let you know soon. regards Alex > Yours, > Linus Walleij >