From: Philipp Zabel <p.zabel@pengutronix.de>
To: Changhuang Liang <changhuang.liang@starfivetech.com>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Emil Renner Berthing <kernel@esmil.dk>
Cc: Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Alexey Charkov <alchark@gmail.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Keguang Zhang <keguang.zhang@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 09/12] reset: starfive: Introduce assert_polarity
Date: Fri, 15 May 2026 11:24:12 +0200 [thread overview]
Message-ID: <2fdfe98c2b99f3cb6b1e0af0f1db3df32d21288a.camel@pengutronix.de> (raw)
In-Reply-To: <20260512083521.3448-10-changhuang.liang@starfivetech.com>
On Di, 2026-05-12 at 01:35 -0700, Changhuang Liang wrote:
> The JHB100 SoC supports inverted operations for reset
> assertion/deassertion, introducing the an assert_polarity field to
> distinguish between different operation logics.
>
> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
> ---
> drivers/reset/starfive/reset-starfive-common.c | 18 +++++++++++++++---
> drivers/reset/starfive/reset-starfive-common.h | 6 ++++++
> 2 files changed, 21 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/reset/starfive/reset-starfive-common.c b/drivers/reset/starfive/reset-starfive-common.c
> index 8ea142ecbd15..c7289c2b2a28 100644
> --- a/drivers/reset/starfive/reset-starfive-common.c
> +++ b/drivers/reset/starfive/reset-starfive-common.c
> @@ -68,7 +68,7 @@ static int starfive_reset_update(struct reset_controller_dev *rcdev,
> reg_status = data->status + offset * sizeof(u32);
> done = data->asserted ? data->asserted[offset] & mask : 0;
>
> - if (!assert)
> + if (data->info && data->info->assert_polarity == assert)
> done ^= mask;
>
> spin_lock_irqsave(&data->lock, flags);
> @@ -90,13 +90,25 @@ static int starfive_reset_update(struct reset_controller_dev *rcdev,
> static int starfive_reset_assert(struct reset_controller_dev *rcdev,
> unsigned long id)
> {
> - return starfive_reset_update(rcdev, id, true);
Please keep this.
> + struct starfive_reset *data = starfive_reset_from(rcdev);
> + bool assert = true;
> +
> + if (data->info && data->info->assert_polarity)
> + assert = false;
And move this into starfive_reset_update().
Consider renaming assert_polarity to active_low or similar, to align
nomenclature with other drivers.
> +
> + return starfive_reset_update(rcdev, id, assert);
> }
>
> static int starfive_reset_deassert(struct reset_controller_dev *rcdev,
> unsigned long id)
> {
> - return starfive_reset_update(rcdev, id, false);
> + struct starfive_reset *data = starfive_reset_from(rcdev);
> + bool deassert = false;
> +
> + if (data->info && data->info->assert_polarity)
> + deassert = true;
Same as for starfive_reset_assert().
regards
Philipp
next prev parent reply other threads:[~2026-05-15 9:24 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 8:35 [PATCH v2 00/12] Add StarFive JHB100 syscon modules Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 01/12] dt-bindings: soc: starfive: " Changhuang Liang
2026-05-12 17:38 ` Conor Dooley
2026-05-12 8:35 ` [PATCH v2 02/12] dt-bindings: clock: Add system-0 domain PLL clock Changhuang Liang
2026-05-14 14:25 ` Krzysztof Kozlowski
2026-05-15 3:27 ` Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 03/12] clk: starfive: Add system-0 domain PLL clock driver Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 04/12] dt-bindings: clock: Add peripheral-0 domain PLL clock Changhuang Liang
2026-05-14 14:25 ` Krzysztof Kozlowski
2026-05-12 8:35 ` [PATCH v2 05/12] clk: starfive: Add peripheral-0 domain PLL clock driver Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 06/12] dt-bindings: clock: Add peripheral-1 domain PLL clock Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 07/12] clk: starfive: Add Peripheral-1 domain PLL clock driver Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 08/12] dt-bindings: reset: Add StarFive JHB100 reset generator Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 09/12] reset: starfive: Introduce assert_polarity Changhuang Liang
2026-05-15 9:24 ` Philipp Zabel [this message]
2026-05-12 8:35 ` [PATCH v2 10/12] reset: starfive: Add syscon reset driver support Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 11/12] soc: starfive: Add socinfo driver for JHB100 SoC Changhuang Liang
2026-05-12 17:45 ` Conor Dooley
2026-05-13 1:01 ` Changhuang Liang
2026-05-13 19:16 ` Conor Dooley
2026-05-14 1:07 ` Changhuang Liang
2026-05-14 17:50 ` Conor Dooley
2026-05-12 8:35 ` [PATCH v2 12/12] riscv: dts: starfive: jhb100: Add syscon nodes Changhuang Liang
2026-05-12 17:40 ` [PATCH v2 00/12] Add StarFive JHB100 syscon modules Conor Dooley
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