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Oktober 2026, 08:53:35 Mitteleurop=C3=A4ische Normalzeit= schrieb Michal Wilczynski: > v_HSYNC_POLARITY() and v_VSYNC_POLARITY() write the wrong bits: the > hardware puts HSYNC in bit 2 and VSYNC in bit 3, the macros do the > opposite. Most CEA modes drive both syncs with the same polarity so it > goes unnoticed; it only shows up on modes where the two differ. >=20 > Fixes: 412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support") > Reported-by: Maud Spierings > Closes: https://lore.kernel.org/all/e780ecb8-918f-4816-99c8-b69b10b25a18@= murena.io/ > Reported-by: Byron Stanoszek > Closes: https://lore.kernel.org/all/b8b046ee-c574-3e16-6079-2fc415633dae@= winds.org/ > Suggested-by: Dominique Belhachemi > Tested-by: Maud Spierings > Tested-by: Byron Stanoszek > Tested-by: OOHehir > Signed-off-by: Michal Wilczynski RK3036 TRM agrees with this assesment :-) Reviewed-by: Heiko Stuebner