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bh=xHyHeKSFmeGChzEgnyhjfuWXXlgy/EN/udP8iYeBM9Y=; b=Ib9ekT7AwMRUYhGvgD9uKKP6GelvUKk6hJUYqrrJ6CRYajukgppFIPL0voa2jIlyrM90yRs02e71g334VJGyTiT4sOp+9d15BoOjXB4WPx6gOIKEO9sIp8l/KeAt2GUT/6cyZP0MsYHZ28SMss613cMocZObIwa/2LKTP+cGTrc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1749730388; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Content-Type:Message-Id:Reply-To; bh=xHyHeKSFmeGChzEgnyhjfuWXXlgy/EN/udP8iYeBM9Y=; b=d+RkCAVL7ZCghwxV5Eux+3bXYGhO6sl4hXL7ifOJnCTCeQn2zHcqD5oCqiGsg2z4 wY20o06EDmfS5LlTr/thtEU5z02fLNUC06JV0yXduO/kai1CtJB7ziqGHNeofc9ov2u xQGtnTc+H1+LtJ9QDY6+Br9AGt45A8vIQDGO5a8A= Received: by mx.zohomail.com with SMTPS id 1749730386061466.0088473265579; Thu, 12 Jun 2025 05:13:06 -0700 (PDT) From: Nicolas Frattaroli To: Sandy Huang , Heiko =?UTF-8?B?U3TDvGJuZXI=?= , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-rockchip@lists.infradead.org Cc: kernel@collabora.com, Andy Yan , Krzysztof Kozlowski , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Cristian Ciocaltea Subject: Re: [PATCH 0/3] arm64: dts: rockchip: Fix HDMI output on RK3576 Date: Thu, 12 Jun 2025 14:13:00 +0200 Message-ID: <3011644.e9J7NaK4W3@workhorse> In-Reply-To: <20250612-rk3576-hdmitx-fix-v1-0-4b11007d8675@collabora.com> References: <20250612-rk3576-hdmitx-fix-v1-0-4b11007d8675@collabora.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="utf-8" On Wednesday, 11 June 2025 23:47:46 Central European Summer Time Cristian Ciocaltea wrote: > Since commit c871a311edf0 ("phy: rockchip: samsung-hdptx: Setup TMDS > char rate via phy_configure_opts_hdmi"), the workaround of passing the > PHY rate from DW HDMI QP bridge driver via phy_set_bus_width() became > partially broken, unless the rate adjustment is done as with RK3588, > i.e. by CCF from VOP2. > > Attempting to fix this up at PHY level would not only introduce > additional hacks, but it would also fail to adequately resolve the > display issues that are a consequence of the system CRU limitations. > > Therefore, let's proceed with the solution already implemented for > RK3588, that is to make use of the HDMI PHY PLL as a more accurate DCLK > source in VOP2. > > It's worth noting a follow-up patch is going to drop the hack from the > bridge driver altogether, while switching to HDMI PHY configuration API > for setting up the TMDS character rate. > > Signed-off-by: Cristian Ciocaltea > --- > Cristian Ciocaltea (3): > dt-bindings: display: vop2: Add optional PLL clock property for rk3576 > arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576 > arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576 > > .../bindings/display/rockchip/rockchip-vop2.yaml | 56 +++++++++++++++++----- > arch/arm64/boot/dts/rockchip/rk3576.dtsi | 7 ++- > 2 files changed, 49 insertions(+), 14 deletions(-) > --- > base-commit: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494 > change-id: 20250611-rk3576-hdmitx-fix-e030fbdb0d17 > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip > For the whole series: Tested-by: Nicolas Frattaroli This fixes HDMI output for 4K resolutions on my RK3576 ArmSoM Sige5. The DTB checks and bindings checks pass as well. Kind regards, Nicolas Frattaroli