From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Conor Dooley <conor@kernel.org>, Anup Patel <apatel@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Atish Patra <atishp@atishpatra.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 4/9] dt-bindings: Add RISC-V incoming MSI controller bindings
Date: Wed, 16 Nov 2022 10:00:27 +0100 [thread overview]
Message-ID: <3037b4f9-268d-df03-380c-393a5d01f3ba@linaro.org> (raw)
In-Reply-To: <Y3QT5Vy3RnIXobHz@spud>
On 15/11/2022 23:34, Conor Dooley wrote:
> On Mon, Nov 14, 2022 at 05:59:00PM +0530, Anup Patel wrote:
>> On Sun, Nov 13, 2022 at 8:18 PM Conor Dooley <conor@kernel.org> wrote:
>
>>> Also, the file name says "riscv,imsic", the description says "IMSIC" but
>>> you've used "imsics" in the compatible. Is this a typo, or a plural?
>>
>> Yes, the file name should be consistent. I will update the file name.
>
> Is there a reason why the compatible is plural when all of the other
> mentions etc do not have an "s"? It really did look like a typo to me.
>
> It's the "incoming MSI controller", so I am unsure as to where the "s"
> actually even comes from. Why not just use "riscv,imsic"?
Yep, should be rather consistent with all others, and IMSIC stands for
Integrated Circuit?
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-11-16 9:00 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-11 4:41 [PATCH 0/9] Linux RISC-V AIA Support Anup Patel
2022-11-11 4:41 ` [PATCH 1/9] RISC-V: Add AIA related CSR defines Anup Patel
2022-11-11 4:42 ` [PATCH 2/9] RISC-V: Detect AIA CSRs from ISA string Anup Patel
2022-11-13 14:20 ` Conor Dooley
2022-11-11 4:42 ` [PATCH 3/9] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2022-11-11 4:42 ` [PATCH 4/9] dt-bindings: Add RISC-V incoming MSI controller bindings Anup Patel
2022-11-11 9:11 ` Atish Patra
2022-11-13 14:48 ` Conor Dooley
2022-11-14 12:29 ` Anup Patel
2022-11-15 22:34 ` Conor Dooley
2022-11-16 9:00 ` Krzysztof Kozlowski [this message]
2022-11-16 9:20 ` Conor Dooley
2022-11-16 9:21 ` Krzysztof Kozlowski
2022-11-16 10:34 ` Anup Patel
2022-11-16 13:29 ` Conor Dooley
2022-11-14 9:49 ` Krzysztof Kozlowski
2022-11-14 12:06 ` Anup Patel
2022-11-14 12:14 ` Conor Dooley
2022-11-14 12:21 ` Krzysztof Kozlowski
2022-11-14 15:04 ` Anup Patel
2022-11-15 14:15 ` Krzysztof Kozlowski
2022-11-16 19:14 ` Rob Herring
2023-01-02 15:59 ` Anup Patel
2022-11-11 4:42 ` [PATCH 5/9] irqchip: Add RISC-V incoming MSI controller driver Anup Patel
2022-11-11 16:02 ` Andrew Bresticker
2023-01-02 16:25 ` Anup Patel
2022-11-11 4:42 ` [PATCH 6/9] dt-bindings: Add RISC-V advanced PLIC bindings Anup Patel
2022-11-13 15:44 ` Conor Dooley
2023-01-02 16:50 ` Anup Patel
2023-01-02 18:17 ` Conor Dooley
2023-01-03 5:10 ` Anup Patel
2023-01-03 8:59 ` Krzysztof Kozlowski
2023-01-03 13:05 ` Anup Patel
2022-11-14 9:51 ` Krzysztof Kozlowski
2022-11-14 12:11 ` Anup Patel
2022-11-16 19:27 ` Rob Herring
2023-01-02 17:18 ` Anup Patel
2022-11-11 4:42 ` [PATCH 7/9] irqchip: Add RISC-V advanced PLIC driver Anup Patel
2022-11-11 23:17 ` Andrew Bresticker
2022-11-11 4:42 ` [PATCH 8/9] RISC-V: Select APLIC and IMSIC drivers for QEMU virt machine Anup Patel
2022-11-15 22:29 ` Conor Dooley
2022-11-11 4:42 ` [PATCH 9/9] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
2022-11-11 9:07 ` [PATCH 0/9] Linux RISC-V AIA Support Atish Patra
2022-11-11 9:13 ` Atish Patra
2022-11-11 19:01 ` Atish Patra
2023-01-02 10:06 ` Anup Patel
2023-01-02 10:05 ` Anup Patel
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