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Sun, 04 Oct 2026 08:29:16 -0700 (PDT) Message-ID: <30637763-03bf-4d3c-a9e9-769de28c729d@linaro.org> Date: Sun, 4 Oct 2026 17:29:10 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Reply-To: Neil Armstrong Subject: Re: [RFC PATCH 5/6] arm64: dts: amlogic: t7: add the ethernet controller To: Lucas Tanure , xianwei.zhao@amlogic.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com References: <20261004144046.391444-1-tanure@linux.com> <20261004144046.391444-6-tanure@linux.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <20261004144046.391444-6-tanure@linux.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/4/26 16:40, Lucas Tanure wrote: > The SoC pairs a Synopsys gigabit MAC with a small block of glue > registers that selects the interface type and trims the clock timing, > and with a multiplexer that points the management bus at either the > on-chip 100M PHY or the external pins. None of it was described, so the > port could not be used at all. > > Add the controller and the multiplexer. The MAC reports a 5.10a core. > The path the controller reaches memory over runs through a pipeline > stage with a gate of its own, so hand that to the controller as well; > nothing else claims it and it would otherwise be switched off as unused, > leaving the port unable to complete a transfer. > > The on-chip PHY behind the second port of the multiplexer is described > the way the G12A does it. No board in tree uses it and that path is > untested. > > The controller is left disabled for boards to enable. > > Assisted-by: LLM > Signed-off-by: Lucas Tanure > --- > arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi | 57 +++++++++++++++++++++ > 1 file changed, 57 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi > index 7bd53ec16607..140f1836f3dd 100644 > --- a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi > +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi > @@ -250,6 +250,31 @@ gic: interrupt-controller@fff01000 { > interrupts = ; > }; > > + ethmac: ethernet@fdc00000 { > + compatible = "amlogic,t7-dwmac", > + "snps,dwmac-5.10a", > + "snps,dwmac"; > + reg = <0x0 0xfdc00000 0x0 0x10000>, > + <0x0 0xfe024000 0x0 0x8>; > + interrupts = ; > + interrupt-names = "macirq"; > + clocks = <&clkc_periphs CLKID_SYS_ETH>, > + <&scmi_clk CLKID_FCLK_DIV2>, > + <&mpll CLKID_MPLL2>, > + <&clkc_periphs CLKID_SYS_AMPIPE_ETH>; > + clock-names = "stmmaceth", "clkin0", "clkin1", "pipeline"; > + power-domains = <&pwrc PWRC_T7_ETH_ID>; > + rx-fifo-depth = <4096>; > + tx-fifo-depth = <2048>; > + status = "disabled"; > + > + mdio0: mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + }; > + > apb4: bus@fe000000 { > compatible = "simple-bus"; > reg = <0x0 0xfe000000 0x0 0x480000>; > @@ -645,6 +670,38 @@ gpio_intc: interrupt-controller@4080 { > <10 11 12 13 14 15 16 17 18 19 20 21>; > }; > > + eth_phy: mdio-multiplexer@28000 { > + compatible = "amlogic,g12a-mdio-mux"; > + reg = <0x0 0x28000 0x0 0xa4>; > + clocks = <&clkc_periphs CLKID_SYS_ETHPHY>, > + <&xtal>, > + <&scmi_clk CLKID_FCLK_50M>; > + clock-names = "pclk", "clkin0", "clkin1"; > + mdio-parent-bus = <&mdio0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ext_mdio: mdio@0 { > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + int_mdio: mdio@1 { > + reg = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + internal_ephy: ethernet-phy@8 { > + compatible = "ethernet-phy-id0180.3301", > + "ethernet-phy-ieee802.3-c22"; > + interrupts = ; > + reg = <8>; > + max-speed = <100>; > + }; > + }; > + }; > + > uart_a: serial@78000 { > compatible = "amlogic,t7-uart", "amlogic,meson-s4-uart"; > reg = <0x0 0x78000 0x0 0x18>; Reviewed-by: Neil Armstrong Thanks, Neil