Re: [PATCH 2/2] ARM: dts: meson: Adding hwrev syscon node

Carlo Caione
2016-02-17T20:36:42Z

On Wed, Feb 17, 2016 at 6:28 PM, Romain Perier <romain.perier-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> These are the CBUS registers used to retrieve the revision and the
> identifier of the SoC on Meson8.
>
> Signed-off-by: Romain Perier <romain.perier-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> arch/arm/boot/dts/meson8b.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
> index 0477a81..71009dc 100644
> --- a/arch/arm/boot/dts/meson8b.dtsi
> +++ b/arch/arm/boot/dts/meson8b.dtsi
> @@ -99,6 +99,11 @@
> };
> };
>
> + hwrev@c1107d4c {
> + compatible = "amlogic,meson8b-hwrev", "syscon";
> + reg = <0xc1107d4c 0x460>;

Interesting. Where did you get 0x460?

> + };
> +
> sram: sram@d9000000 {
> compatible = "mmio-sram";
> reg = <0xd9000000 0x20000>;

This patch fails to apply on the current master. Probably because you
have based this patch on a repo containing (as I can see) also my WiP
patches on SMP.

--
Carlo Caione