Re: [PATCH 2/2] ARM: dts: meson: Adding hwrev syscon node

Carlo Caione
2016-02-26T17:40:11Z

On Fri, Feb 26, 2016 at 6:00 PM, Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> wrote:
> On Friday 26 February 2016 17:43:54 Carlo Caione wrote:

[cut]

>> AFAICT (I'm not the driver author) there is no a really strict reason
>> to have one single driver accessing registers on both buses. Of course
>> the driver has to be changed a bit.
>> Are you suggesting to have two different drivers with two different compatibles?
>
> Just an idea, but yes: if the register layout is different, then they
> would also need different compatible strings.

The meson pin controller driver basically defines the register layout
in the DTS: http://lxr.free-electrons.com/source/arch/arm/boot/dts/meson8.dtsi
#L102 and #L111, so yes, we have a different layouts.

> This is mostly a question of how the hardware design really looks:
> are these two separate pin controllers that each are responsible for
> a clear subset of the pins?

Exactly. All the GPIOAO_XX pins are managed by the pin controller on the AO bus.
At this point I guess it is needed to rework a bit the pinctrl driver
to address this problem switching to two drivers with different
compatibles for the two buses.

Thanks,

--
Carlo Caione