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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id z10-20020a056512370a00b0049478cc4eb9sm2165lfr.230.2022.09.20.08.20.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 Sep 2022 08:20:09 -0700 (PDT) Message-ID: <30ea787d-8987-8bb3-4fb6-c2c547b8c223@linaro.org> Date: Tue, 20 Sep 2022 17:20:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [PATCH 1/2] arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node Content-Language: en-US To: Dinh Nguyen , jh80.chung@samsung.com Cc: ulf.hansson@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20220919181309.286611-1-dinguyen@kernel.org> From: Krzysztof Kozlowski In-Reply-To: <20220919181309.286611-1-dinguyen@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 19/09/2022 20:13, Dinh Nguyen wrote: > The sdmmc controller's CIU(Card Interface Unit) clock's phase can be > adjusted through the register in the system manager. Add the binding > "altr,sysmgr-syscon" to the SDMMC node for the driver to access the > system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to > designate the smpsel and drvsel properties for the CIU clock. > > Signed-off-by: Dinh Nguyen > --- > arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 1 + > arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 1 + > arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 1 + > arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 1 + > arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 1 + > 5 files changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi > index 14c220d87807..a5d08920ac81 100644 > --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi > +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi > @@ -309,6 +309,7 @@ mmc: mmc@ff808000 { > <&clkmgr STRATIX10_SDMMC_CLK>; > clock-names = "biu", "ciu"; > iommus = <&smmu 5>; > + altr,sysmgr-syscon = <&sysmgr 0x28 0>; Missing bindings change. Best regards, Krzysztof