From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Stuebner Subject: Re: [PATCH v3 5/9] clk: rockchip: fix up the pll clks error for rv1108 SoC Date: Tue, 08 Aug 2017 17:11:51 +0200 Message-ID: <31298853.0NzRDp6Diq@phil> References: <1502176547-30817-1-git-send-email-zhangqing@rock-chips.com> <1502176675-32228-1-git-send-email-zhangqing@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: <1502176675-32228-1-git-send-email-zhangqing@rock-chips.com> Sender: linux-clk-owner@vger.kernel.org To: Elaine Zhang Cc: mturquette@baylibre.com, sboyd@codeaurora.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, xxx@rock-chips.com, xf@rock-chips.com, huangtao@rock-chips.com, shawn.lin@rock-chips.com, andy.yan@rock-chips.com List-Id: devicetree@vger.kernel.org Am Dienstag, 8. August 2017, 15:17:55 CEST schrieb Elaine Zhang: > fix up the lock_shift describe error. > remove the ROCKCHIP_PLL_SYNC_RATE flag for gpll. > > Signed-off-by: Elaine Zhang already picked the one from Andy's v2, so ignored this one Heiko