[PATCH v5 0/6] add basic rk3288 smp support

[PATCH v5 0/6] add basic rk3288 smp support

[Kever Yang]

rk3288 is qual-core CPU Soc, we enable the smp in this patch.

In version 3 we use regmap and pmu syscon for cpu power on/off.
This should be work after Pankaj Dubey's patch applied:
"syscon: Decouple syscon interface from platform devices"
(https://lkml.org/lkml/2014/9/30/156)

Changes in v5:
- use read_cpuid_part() but not read_cpuid_part_number()

Changes in v4:
- add rockchip,pmu property into cpus.txt
- merge patch "fix up rk3288 smp cpu hotplug" into this patch
- remove "rockchip,rk3288-pmu-sram" because we don't use it here
- modify the author info for patches

Changes in v3:
- add pmu regmap patches in version 3
- use one ops and secondary_starup for all rockchip SOCs
- pick back the power domain operation for cpu hotplug
- remove 'enable-method' from this patch
- add compitable name "rockchip,rk3288-pmu-sram" for pmu-intmem

Changes in v2:
- use rk3288_boot_secondary instead ofsmp_boot_secondary
- discards the power domain operation
- handle the per cpu starup when actived by 'sev'
- adjust the alignment

Kever Yang (6):
  ARM: rockchip: convert to regmap and use pmu syscon if available
  ARM: rockchip: add option to access the pmu via a phandle in
    smp_operations
  ARM: dts: rockchip: add pmu references to cpus nodes
  ARM: rockchip: add basic smp support for rk3288
  ARM: dts: rockchip: add intmem node for rk3288 smp support
  ARM: dts: rockchip: add reset for CPU nodes

 Documentation/devicetree/bindings/arm/cpus.txt |   9 +
 arch/arm/boot/dts/rk3288.dtsi                  |  18 ++
 arch/arm/mach-rockchip/headsmp.S               |   5 +-
 arch/arm/mach-rockchip/platsmp.c               | 223 ++++++++++++++++++++-----
 4 files changed, 211 insertions(+), 44 deletions(-)

-- 
1.9.1

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[PATCH v5 2/6] ARM: rockchip: add option to access the pmu via a phandle in smp_operations

[Kever Yang]

From: Heiko Stuebner <heiko@sntech.de>

Makes it possible to define a rockchip,pmu phandle in the cpus node directly
referencing the pmu syscon instead of searching for specific compatible.

The old way of finding the pmu stays of course available.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

Changes in v5: None
Changes in v4:
- add rockchip,pmu property into cpus.txt

Changes in v3:
- add this patch

Changes in v2: None

 Documentation/devicetree/bindings/arm/cpus.txt |  9 +++++++++
 arch/arm/mach-rockchip/platsmp.c               | 13 +++++++++++++
 2 files changed, 22 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index fc44634..b2aacbe 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -227,6 +227,15 @@ nodes to be present and contain the properties described below.
 			# List of phandles to idle state nodes supported
 			  by this cpu [3].
 
+	- rockchip,pmu
+		Usage: optional for systems that have an "enable-method"
+		       property value of "rockchip,rk3066-smp"
+		       While optional, it is the preferred way to get access to
+		       the cpu-core power-domains.
+		Value type: <phandle>
+		Definition: Specifies the syscon node controlling the cpu core
+			    power domains.
+
 Example 1 (dual-cluster big.LITTLE system 32-bit):
 
 	cpus {
diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index 4c36fbf..57b53b3 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -155,6 +155,19 @@ static int __init rockchip_smp_prepare_pmu(void)
 	struct device_node *node;
 	void __iomem *pmu_base;
 
+	/*
+	 * This function is only called via smp_ops->smp_prepare_cpu().
+	 * That only happens if a "/cpus" device tree node exists
+	 * and has an "enable-method" property that selects the SMP
+	 * operations defined herein.
+	 */
+	node = of_find_node_by_path("/cpus");
+
+	pmu = syscon_regmap_lookup_by_phandle(node, "rockchip,pmu");
+	of_node_put(node);
+	if (!IS_ERR(pmu))
+		return 0;
+
 	pmu = syscon_regmap_lookup_by_compatible("rockchip,rk3066-pmu");
 	if (!IS_ERR(pmu))
 		return 0;
-- 
1.9.1

[PATCH v5 3/6] ARM: dts: rockchip: add pmu references to cpus nodes

[Kever Yang]

This patch add pmu reference and enable-method for smp

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

Changes in v5: None
Changes in v4: None
Changes in v3:
- add this patch

Changes in v2: None

 arch/arm/boot/dts/rk3288.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 874e66d..bcfde19 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -46,6 +46,8 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
+		rockchip,pmu = <&pmu>;
 
 		cpu@500 {
 			device_type = "cpu";
-- 
1.9.1

[PATCH v5 5/6] ARM: dts: rockchip: add intmem node for rk3288 smp support

[Kever Yang]

This patch add intmem node des which is needed by platsmp.c

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

Changes in v5: None
Changes in v4:
- remove "rockchip,rk3288-pmu-sram" because we don't use it here

Changes in v3:
- remove 'enable-method' from this patch
- add compitable name "rockchip,rk3288-pmu-sram" for pmu-intmem

Changes in v2:
- adjust the alignment

 arch/arm/boot/dts/rk3288.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index bcfde19..726c5c7 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -441,6 +441,18 @@
 		status = "disabled";
 	};
 
+	bus_intmem@ff700000 {
+		compatible = "mmio-sram";
+		reg = <0xff700000 0x18000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0xff700000 0x18000>;
+		smp-sram@0 {
+			compatible = "rockchip,rk3066-smp-sram";
+			reg = <0x00 0x10>;
+		};
+	};
+
 	pmu: power-management@ff730000 {
 		compatible = "rockchip,rk3288-pmu", "syscon";
 		reg = <0xff730000 0x100>;
-- 
1.9.1

[PATCH v5 6/6] ARM: dts: rockchip: add reset for CPU nodes

[Kever Yang]

This patch add reset for CPU nodes to use the reset controller.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/boot/dts/rk3288.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 726c5c7..cb614fc 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -53,21 +53,25 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a12";
 			reg = <0x500>;
+			resets = <&cru SRST_CORE0>;
 		};
 		cpu@501 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a12";
 			reg = <0x501>;
+			resets = <&cru SRST_CORE1>;
 		};
 		cpu@502 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a12";
 			reg = <0x502>;
+			resets = <&cru SRST_CORE2>;
 		};
 		cpu@503 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a12";
 			reg = <0x503>;
+			resets = <&cru SRST_CORE3>;
 		};
 	};
 
-- 
1.9.1

Re: [PATCH v5 0/6] add basic rk3288 smp support

[Kevin Hilman]

Kever Yang <kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org> writes:

> rk3288 is qual-core CPU Soc, we enable the smp in this patch.
>
> In version 3 we use regmap and pmu syscon for cpu power on/off.
> This should be work after Pankaj Dubey's patch applied:
> "syscon: Decouple syscon interface from platform devices"
> (https://lkml.org/lkml/2014/9/30/156)

Tested on top of linux-next (next-20141020) along with above syscon
dependency, and verifed that 4 CPUs boot up on my rk3288-evb-rk808.

Tested-by: Kevin Hilman <khilman-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>

Kevin
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Re: [PATCH v5 2/6] ARM: rockchip: add option to access the pmu via a phandle in smp_operations

[Heiko Stübner]

Hi Kever,

Am Mittwoch, 15. Oktober 2014, 10:23:01 schrieb Kever Yang:
> From: Heiko Stuebner <heiko@sntech.de>
> 
> Makes it possible to define a rockchip,pmu phandle in the cpus node directly
> referencing the pmu syscon instead of searching for specific compatible.
> 
> The old way of finding the pmu stays of course available.
> 
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

I've tested the series again on all our supported platforms - no regressions.

The series itself also looks nice and ready to go to me, but I think we'll 
need to give the devicetree maintainers some more days, if they want to 
complain about our new rockchip,pmu property.


Heiko


> ---
> 
> Changes in v5: None
> Changes in v4:
> - add rockchip,pmu property into cpus.txt
> 
> Changes in v3:
> - add this patch
> 
> Changes in v2: None
> 
>  Documentation/devicetree/bindings/arm/cpus.txt |  9 +++++++++
>  arch/arm/mach-rockchip/platsmp.c               | 13 +++++++++++++
>  2 files changed, 22 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt
> b/Documentation/devicetree/bindings/arm/cpus.txt index fc44634..b2aacbe
> 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -227,6 +227,15 @@ nodes to be present and contain the properties
> described below. # List of phandles to idle state nodes supported
>  			  by this cpu [3].
> 
> +	- rockchip,pmu
> +		Usage: optional for systems that have an "enable-method"
> +		       property value of "rockchip,rk3066-smp"
> +		       While optional, it is the preferred way to get access to
> +		       the cpu-core power-domains.
> +		Value type: <phandle>
> +		Definition: Specifies the syscon node controlling the cpu core
> +			    power domains.
> +
>  Example 1 (dual-cluster big.LITTLE system 32-bit):
> 
>  	cpus {
> diff --git a/arch/arm/mach-rockchip/platsmp.c
> b/arch/arm/mach-rockchip/platsmp.c index 4c36fbf..57b53b3 100644
> --- a/arch/arm/mach-rockchip/platsmp.c
> +++ b/arch/arm/mach-rockchip/platsmp.c
> @@ -155,6 +155,19 @@ static int __init rockchip_smp_prepare_pmu(void)
>  	struct device_node *node;
>  	void __iomem *pmu_base;
> 
> +	/*
> +	 * This function is only called via smp_ops->smp_prepare_cpu().
> +	 * That only happens if a "/cpus" device tree node exists
> +	 * and has an "enable-method" property that selects the SMP
> +	 * operations defined herein.
> +	 */
> +	node = of_find_node_by_path("/cpus");
> +
> +	pmu = syscon_regmap_lookup_by_phandle(node, "rockchip,pmu");
> +	of_node_put(node);
> +	if (!IS_ERR(pmu))
> +		return 0;
> +
>  	pmu = syscon_regmap_lookup_by_compatible("rockchip,rk3066-pmu");
>  	if (!IS_ERR(pmu))
>  		return 0;

Re: [PATCH v5 0/6] add basic rk3288 smp support

[Heiko Stübner]

Am Mittwoch, 15. Oktober 2014, 10:22:59 schrieb Kever Yang:
> rk3288 is qual-core CPU Soc, we enable the smp in this patch.

applied this series with Kevin's test-tag split to dts and soc branches for 
3.19.