From: Heiko Stuebner <heiko@sntech.de>
To: krzk+dt@kernel.org, palmer@dabbelt.com, robh+dt@kernel.org,
linux-riscv@lists.infradead.org
Cc: conor.dooley@microchip.com, Cyril.Jean@microchip.com,
daire.mcnamara@microchip.com, paul.walmsley@sifive.com,
aou@eecs.berkeley.edu, palmer@rivosinc.com, arnd@arndb.de,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, Rob Herring <robh@kernel.org>,
Conor Dooley <mail@conchuod.ie>
Subject: Re: [PATCH v3 2/8] riscv: dts: microchip: move sysctrlr out of soc bus
Date: Wed, 04 May 2022 01:37:53 +0200 [thread overview]
Message-ID: <3166309.aeNJFYEL58@phil> (raw)
In-Reply-To: <20220501192557.2631936-3-mail@conchuod.ie>
Am Sonntag, 1. Mai 2022, 21:25:53 CEST schrieb Conor Dooley:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> The MPFS system controller has no registers of its own, so move it out
> of the soc node to avoid dtbs_check warnings:
> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: soc: syscontroller: {'compatible': ['microchip,mpfs-sys-controller'], 'mboxes': [[15, 0]], 'status': ['okay']} should not be valid under {'type': 'object'}
>
> Reported-by: Palmer Dabbelt <palmer@rivosinc.com>
> Suggested-by: Rob Herring <robh@kernel.org>
> Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree")
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
What function does the "soc-bus" have at all?
I.e. mailbox@37020000 also looks like a peripheral
of the chip but is outside it.
And I remember getting the suggestion to not use soc-"busses"
over in arm-land years ago [0].
[0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c3030d30d9c99c057b5ddfa289cffa637a2775f5
> ---
> arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index 746c4d4e7686..bf21a2edd180 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -146,6 +146,11 @@ refclk: mssrefclk {
> #clock-cells = <0>;
> };
>
> + syscontroller: syscontroller {
> + compatible = "microchip,mpfs-sys-controller";
> + mboxes = <&mbox 0>;
> + };
> +
> soc {
> #address-cells = <2>;
> #size-cells = <2>;
> @@ -446,10 +451,5 @@ mbox: mailbox@37020000 {
> #mbox-cells = <1>;
> status = "disabled";
> };
> -
> - syscontroller: syscontroller {
> - compatible = "microchip,mpfs-sys-controller";
> - mboxes = <&mbox 0>;
> - };
> };
> };
>
next prev parent reply other threads:[~2022-05-03 23:38 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-01 19:25 [PATCH v3 0/8] PolarFire SoC dt for 5.19 Conor Dooley
2022-05-01 19:25 ` [PATCH v3 1/8] riscv: dts: microchip: remove icicle memory clocks Conor Dooley
2022-05-03 23:29 ` Heiko Stuebner
2022-05-01 19:25 ` [PATCH v3 2/8] riscv: dts: microchip: move sysctrlr out of soc bus Conor Dooley
2022-05-03 23:37 ` Heiko Stuebner [this message]
2022-05-04 6:43 ` Conor.Dooley
2022-05-01 19:25 ` [PATCH v3 3/8] riscv: dts: microchip: remove soc vendor from filenames Conor Dooley
2022-05-03 23:39 ` Heiko Stuebner
2022-05-01 19:25 ` [PATCH v3 4/8] dt-bindings: riscv: microchip: document icicle reference design Conor Dooley
2022-05-03 15:27 ` Krzysztof Kozlowski
2022-05-01 19:25 ` [PATCH v3 5/8] riscv: dts: microchip: make the fabric dtsi board specific Conor Dooley
2022-05-03 23:47 ` Heiko Stuebner
2022-05-04 6:48 ` Conor.Dooley
2022-05-04 7:11 ` Heiko Stübner
2022-05-01 19:25 ` [PATCH v3 6/8] dt-bindings: vendor-prefixes: add Sundance DSP Conor Dooley
2022-05-01 19:25 ` [PATCH v3 7/8] dt-bindings: riscv: microchip: add polarberry compatible string Conor Dooley
2022-05-01 19:25 ` [PATCH v3 8/8] riscv: dts: microchip: add the sundance polarberry Conor Dooley
2022-05-03 23:55 ` Heiko Stuebner
2022-05-04 6:51 ` Conor.Dooley
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