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Thu, 16 Jul 2026 04:12:20 -0700 (PDT) X-Received: by 2002:a05:6a00:301a:b0:847:968d:b101 with SMTP id d2e1a72fcca58-84a51442e0cmr10682655b3a.21.1784200340258; Thu, 16 Jul 2026 04:12:20 -0700 (PDT) Received: from [10.217.216.90] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84a4f23a5f3sm4578248b3a.5.2026.07.16.04.12.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Jul 2026 04:12:19 -0700 (PDT) Message-ID: <316fd37b-9936-4bca-8521-9a11ee65cbd6@oss.qualcomm.com> Date: Thu, 16 Jul 2026 16:42:11 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/3] dt-bindings: clock: qcom: glymur-gcc: Add missing CX power domain To: Abel Vesa Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Maulik Shah , Dmitry Baryshkov , Jyothi Kumar Seerapu , Konrad Dybcio , Brian Masney , Krzysztof Kozlowski , Sibi Sankar , Pankaj Patil , Akhil P Oommen , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jishnu Prakash , Raviteja Laggyshetty , Kamal Wadhwa , Qiang Yu , Manaf Meethalavalappu Pallikunhi , Abel Vesa References: <20260715-glymur-fix-gcc-cx-scaling-v3-0-72eb5adad156@oss.qualcomm.com> <20260715-glymur-fix-gcc-cx-scaling-v3-1-72eb5adad156@oss.qualcomm.com> <4b543abe-2482-4381-b41e-623cdf5be9a2@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDExNSBTYWx0ZWRfXzAkW/yG0uyRv k4VUVzrybTcnHIOjkJ8E1mEObPE3ZtIu4FUIqP0JHvMW+hcWljF2y5TJwAWz/3lEfuTZ/eLqSoM HwCCyHFR7sN7xDyQ99gEsiWmWj7VV+CoCO+dSZv6oUQhIzfZWI7ZIKFFeu4renGlQf6G+ZI8/gp ijchRuxnP7o0bt2Uv893tw7Z3FNo5tF7O2F51g9IIirOW0jAYMM7RR+7PKmTcxZBTry2qLMusvo j7pESVNa9UnekEavfkAJ8xEUJwazSxoV50iftiXGUYl1f5WJ5w++khGEQFEJNZCN5iD8EZA5GFv y3qClcZg1lmawwyhKCVCi6gy2Z7rF0PvWpWzU1+jWLkHPIxdLeYADwaTLyhrmZEos0LBNujil6N PHE0lfbTguW4CLABmLJGS+fvv+VSxSo8h8YpEZipCSMeg/iIavcrmavkMJqFmOAdWo9wViUbRu1 C4RsahDjZi1MhV6ZuyQ== X-Authority-Analysis: v=2.4 cv=DvpmPm/+ c=1 sm=1 tr=0 ts=6a58bc95 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=1U0sEZR_6ltlo9pre54A:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-GUID: GlRDM8rrTq1Ewy0uMMWkqj1mLwq11l7H X-Proofpoint-ORIG-GUID: GlRDM8rrTq1Ewy0uMMWkqj1mLwq11l7H X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDExNSBTYWx0ZWRfX54ftgydOR5r4 OibIxeleSRKFtzUIZxWWCuUjGPQYFbTMTQ6BzT7LiqS+rD0BdKxnBeyqXbXlmpumk8/osIUN4rK 8zBFHhlJTxCPr6D+UVziPxvYMsVrHIQ= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_04,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 malwarescore=0 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160115 On 7/16/2026 12:52 PM, Abel Vesa wrote: > On 26-07-16 10:13:48, Taniya Das wrote: >> >> >> On 7/15/2026 6:59 PM, Abel Vesa wrote: >>> The GDSCs provided by the Glymur GCC are supplied by the RPMh CX power >>> domain. Model that parent domain in the GCC binding so the provider can >>> describe the dependency in devicetree. >>> >>> Add a single CX power-domain entry to the binding and make it required, >>> matching the hardware description needed by the GCC node. >>> >>> Fixes: ee2d967030fe ("dt-bindings: clock: qcom: document the Glymur Global Clock Controller") >>> Signed-off-by: Abel Vesa >>> --- >>> Documentation/devicetree/bindings/clock/qcom,glymur-gcc.yaml | 8 ++++++++ >>> 1 file changed, 8 insertions(+) >> >> >> Abel, I feel we should add the 'required-opps' as well which will ensure >> the clock controllers minimum voltage requirement. > > But it was agreed in v1 that we should not add the required-opps. So we > dropped it in v2. > Okay, sorry, may be I missed that comment. > Can you give more details to why you think it is needed ? My reasoning is that if a clock controller requires a rail, it is preferable to explicitly specify the required operating level rather than rely on system/client vote. This makes the dependency self-contained and easier to reason about. Clients that require a higher operating level than the clock controller's minimum requirement remain free to vote for a higher level as needed. -- Thanks, Taniya Das