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From: Marek Vasut <marex@denx.de>
To: Gatien Chevallier <gatien.chevallier@foss.st.com>,
	Olivia Mackall <olivia@selenic.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Lionel Debieve <lionel.debieve@foss.st.com>
Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/4] hwrng: stm32 - implement support for STM32MP25x platforms
Date: Fri, 11 Oct 2024 18:17:04 +0200	[thread overview]
Message-ID: <318dbd5e-f547-4d78-b42e-4dcacc08d328@denx.de> (raw)
In-Reply-To: <20241011-rng-mp25-v2-v2-2-76fd6170280c@foss.st.com>

On 10/11/24 5:41 PM, Gatien Chevallier wrote:

[...]

> @@ -551,6 +565,41 @@ static int stm32_rng_probe(struct platform_device *ofdev)
>   	priv->rng.read = stm32_rng_read;
>   	priv->rng.quality = 900;
>   
> +	if (!priv->data->nb_clock || priv->data->nb_clock > 2)
> +		return -EINVAL;
> +
> +	priv->clk_bulk = devm_kzalloc(dev, priv->data->nb_clock * sizeof(*priv->clk_bulk),
> +				      GFP_KERNEL);
> +	if (!priv->clk_bulk)
> +		return -ENOMEM;

Try this:

ret = devm_clk_bulk_get(dev, priv->data->nb_clock, priv->clk_bulk);
...
// Swap the clock if they are not in the right order:
if (priv->data->nb_clock == 2 &&
     strcmp(__clk_get_name(priv->clk_bulk[0].clk), "core"))
{
  const char *id = priv->clk_bulk[1].id;
  struct clk *clk = priv->clk_bulk[1].clk;
  priv->clk_bulk[1].id = priv->clk_bulk[0].id;
  priv->clk_bulk[1].clk = priv->clk_bulk[0].clk;
  priv->clk_bulk[0].id = id;
  priv->clk_bulk[0].clk = clk;
}

> +	if (priv->data->nb_clock == 2) {
> +		struct clk *clk;
> +		struct clk *bus_clk;
> +
> +		clk = devm_clk_get(&ofdev->dev, "core");
> +		if (IS_ERR(clk))
> +			return PTR_ERR(clk);
> +
> +		bus_clk = devm_clk_get(&ofdev->dev, "bus");
> +		if (IS_ERR(clk))
> +			return PTR_ERR(bus_clk);
> +
> +		priv->clk_bulk[0].clk = clk;
> +		priv->clk_bulk[0].id = "core";
> +		priv->clk_bulk[1].clk = bus_clk;
> +		priv->clk_bulk[1].id = "bus";
> +	} else {
> +		struct clk *clk;
> +
> +		clk = devm_clk_get(&ofdev->dev, NULL);
> +		if (IS_ERR(clk))
> +			return PTR_ERR(clk);
> +
> +		priv->clk_bulk[0].clk = clk;
> +		priv->clk_bulk[0].id = "core";
> +	}


  reply	other threads:[~2024-10-11 16:18 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-11 15:41 [PATCH v2 0/4] Add support for stm32mp25x RNG Gatien Chevallier
2024-10-11 15:41 ` [PATCH v2 1/4] dt-bindings: rng: add st,stm32mp25-rng support Gatien Chevallier
2024-10-14  7:29   ` Krzysztof Kozlowski
2024-10-14  9:31     ` Gatien CHEVALLIER
2024-10-11 15:41 ` [PATCH v2 2/4] hwrng: stm32 - implement support for STM32MP25x platforms Gatien Chevallier
2024-10-11 16:17   ` Marek Vasut [this message]
2024-10-14  8:38     ` Gatien CHEVALLIER
2024-10-14  8:52       ` Marek Vasut
2024-10-14 12:36         ` Gatien CHEVALLIER
2024-10-14 18:55           ` Marek Vasut
2024-10-15 15:10             ` Gatien CHEVALLIER
2024-10-15 15:39               ` Marek Vasut
2024-10-16  7:54                 ` Gatien CHEVALLIER
2024-10-15  6:46   ` kernel test robot
2024-10-11 15:41 ` [PATCH v2 3/4] hwrng: stm32 - update STM32MP15 RNG max clock frequency Gatien Chevallier
2024-10-11 16:17   ` Marek Vasut
2024-10-11 15:41 ` [PATCH v2 4/4] arm64: dts: st: add RNG node on stm32mp251 Gatien Chevallier
2024-10-11 16:17   ` Marek Vasut

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