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From: "Heiko Stübner" <heiko@sntech.de>
To: Johan Jonker <jbx6244@gmail.com>
Cc: helen.koike@collabora.com, dafna.hirschfeld@collabora.com,
	devel@driverdev.osuosl.org, devicetree@vger.kernel.org,
	ezequiel@collabora.com, hverkuil-cisco@xs4all.nl,
	karthik.poduval@gmail.com, kernel@collabora.com,
	linux-kernel@vger.kernel.org, linux-media@vger.kernel.org,
	linux-rockchip@lists.infradead.org, mark.rutland@arm.com,
	robh+dt@kernel.org
Subject: Re: [PATCH 3/4] arm64: dts: rockchip: add rx0 mipi-phy for rk3399
Date: Thu, 02 Apr 2020 16:49:18 +0200	[thread overview]
Message-ID: <3198644.TY9RtKZRLE@diego> (raw)
In-Reply-To: <76211530-73ff-5f36-8915-8bdc036d4369@gmail.com>

Am Donnerstag, 2. April 2020, 16:37:52 CEST schrieb Johan Jonker:
> On 4/2/20 4:31 PM, Heiko Stübner wrote:
> > Am Donnerstag, 2. April 2020, 15:48:02 CEST schrieb Johan Jonker:
> >> Hi Helen,
> >>
> >>> From: Helen Koike <helen.koike@collabora.com>
> >>
> >>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> >>> index 33cc21fcf4c10..fc0295d2a65a1 100644
> >>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> >>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> >>> @@ -1394,6 +1394,17 @@ io_domains: io-domains {
> >>>  			status = "disabled";
> >>>  		};
> >>>  
> >>
> >>> +		mipi_dphy_rx0: mipi-dphy-rx0 {
> >>
> >> For Heiko sort syscon@ff770000 subnodes alphabetical or reg value first?
> > 
> > Similar to main nodes ... so things without reg alphabetical,
> > the rest by reg address
> > 
> alphabetical first:
> 
> io-domains
> mipi-dphy-rx0
> usb2-phy@e450

like this ... aka similar to what we do in the core nodes.

For the record, pinctrl at the bottom of a soc.dtsi is ok.


Heiko

> .@..
> 
> or
> 
> with reg values first:
> 
> .@..
> emmc_phy: phy@f780
> mipi-dphy-rx0
> pcie-phy
> 
> > 
> >>
> >>> +			compatible = "rockchip,rk3399-mipi-dphy-rx0";
> >>> +			clocks = <&cru SCLK_MIPIDPHY_REF>,
> >>
> >>> +				<&cru SCLK_DPHY_RX0_CFG>,
> >>> +				<&cru PCLK_VIO_GRF>;
> >>
> >> Align                            ^
> >>
> >>> +			clock-names = "dphy-ref", "dphy-cfg", "grf";
> >>> +			power-domains = <&power RK3399_PD_VIO>;
> >>> +			#phy-cells = <0>;
> >>> +			status = "disabled";
> >>> +		};
> >>> +
> >>>  		u2phy0: usb2-phy@e450 {
> >>>  			compatible = "rockchip,rk3399-usb2phy";
> >>>  			reg = <0xe450 0x10>;
> >>
> >>
> > 
> > 
> > 
> > 
> 
> 





  reply	other threads:[~2020-04-02 14:49 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-02  0:02 [PATCH 0/4] move Rockchip ISP bindings out of staging / add ISP DT nodes for RK3399 Helen Koike
2020-04-02  0:02 ` [PATCH 1/4] dt-bindings: phy: phy-rockchip-dphy-rx0: move rockchip dphy rx0 bindings out of staging Helen Koike
2020-04-02 12:16   ` Johan Jonker
2020-04-02 14:42     ` Helen Koike
2020-04-02 16:17   ` Ezequiel Garcia
2020-04-03 13:00     ` Helen Koike
2020-04-02  0:02 ` [PATCH 2/4] dt-bindings: media: rkisp1: move rockchip-isp1 " Helen Koike
2020-04-02 11:35   ` Johan Jonker
2020-04-02 14:42     ` Helen Koike
2020-04-02  0:02 ` [PATCH 3/4] arm64: dts: rockchip: add rx0 mipi-phy for rk3399 Helen Koike
2020-04-02 13:48   ` Johan Jonker
2020-04-02 14:31     ` Heiko Stübner
2020-04-02 14:37       ` Johan Jonker
2020-04-02 14:49         ` Heiko Stübner [this message]
2020-04-02 14:43       ` Helen Koike
2020-04-02  0:02 ` [PATCH 4/4] arm64: dts: rockchip: add isp0 node " Helen Koike
2020-04-02 17:20   ` Johan Jonker
2020-04-02 19:46     ` Helen Koike
2020-04-02 20:10       ` Johan Jonker

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