From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Conor Dooley <conor@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: Jack Zhu <jack.zhu@starfivetech.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v4 1/3] dt-bindings: phy: Add starfive,jh7110-dphy-rx
Date: Sun, 16 Apr 2023 19:29:32 +0200 [thread overview]
Message-ID: <31c582a7-682a-330e-51d4-53b4a0c5f3a2@linaro.org> (raw)
In-Reply-To: <0c94aadf-fac3-d05c-1c54-ae8337526849@starfivetech.com>
On 13/04/2023 11:02, Changhuang Liang wrote:
>
>
> On 2023/4/13 16:41, Krzysztof Kozlowski wrote:
>> On 13/04/2023 04:34, Changhuang Liang wrote:
>>>>>>> + lane_maps:
>>>>>>
>>>>>> Why did this appear? Underscores are not allowed. It looks like you
>>>>>> re-implement some standard property.
>>>>>>
>>>>>
>>>>> Will change to lane-maps.
>>>>> Yes, according to Vinod advice, lane mapping table use device tree
>>>>> to parse makes sense.
>>>>
>>>> Hm, I have a feeling that I saw such property, so you should dig into
>>>> existing and in-flight bindings.
>>>>
>>>> Best regards,
>>>> Krzysztof
>>>>
>>>
>>> A standard property? Like "clocks" or "resets"?
>>
>> Like lane-polarities now submitted to one MIPI.
>>
>> Anyway it does not look like a property of a board. You said it is fixed
>> per SoC, so it should be implied from the compatible. Otherwise please
>> explain in description and provide some rationale.
>>
>> Best regards,
>> Krzysztof
>>
>
> This property is the only one used for this IP, I have compared this IP with
> other DPHY rx module, DPHY modules form the other manufacturers not have this
> configure.
> And we also have a SoC called JH7100. It DPHY rx module is the same as JH7110.
> But we don't do the upstream work on it. If it use this lane-maps will be
> configure as "lane_maps = /bits/ 8 <0 1 2 3 4 5>;".
And JH7100 is different SoC, so you have different compatible. Again -
is this board specific? If not, looks like SoC specific, thus imply it
from compatible.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-04-16 17:29 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-12 8:45 [PATCH v4 0/3] Add JH7110 MIPI DPHY RX support Changhuang Liang
2023-04-12 8:45 ` [PATCH v4 1/3] dt-bindings: phy: Add starfive,jh7110-dphy-rx Changhuang Liang
2023-04-12 11:34 ` Krzysztof Kozlowski
2023-04-12 12:42 ` Changhuang Liang
2023-04-12 16:55 ` Krzysztof Kozlowski
2023-04-13 1:29 ` Changhuang Liang
2023-04-13 2:34 ` Changhuang Liang
2023-04-13 8:41 ` Krzysztof Kozlowski
2023-04-13 9:02 ` Changhuang Liang
2023-04-16 17:29 ` Krzysztof Kozlowski [this message]
2023-04-17 3:37 ` Changhuang Liang
2023-05-04 1:21 ` Changhuang Liang
2023-04-18 18:42 ` Rob Herring
2023-04-18 18:46 ` Rob Herring
2023-04-19 6:10 ` Changhuang Liang
2023-04-12 8:45 ` [PATCH v4 2/3] phy: starfive: Add mipi dphy rx support Changhuang Liang
2023-04-12 8:45 ` [PATCH v4 3/3] riscv: dts: starfive: Add dphy rx node Changhuang Liang
2023-05-22 13:00 ` [PATCH v4 0/3] Add JH7110 MIPI DPHY RX support Changhuang Liang
2023-05-22 13:11 ` Conor Dooley
2023-05-23 1:02 ` Changhuang Liang
2023-05-23 5:13 ` Conor Dooley
2023-05-23 5:54 ` Changhuang Liang
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