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charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.4 (3.52.4-1.fc40) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi Angelo, Just some minor (not that big of a deal comments) On Thu, 2024-10-24 at 17:02 +0200, Angelo Dureghello wrote: > Hi Nuno, >=20 > On 24.10.2024 15:05, Nuno S=C3=A1 wrote: > > On Tue, 2024-10-22 at 18:40 +0200, Angelo Dureghello wrote: > > > Hi Nuno, > > >=20 > > > On 22.10.2024 14:28, Nuno S=C3=A1 wrote: > > > > On Mon, 2024-10-21 at 14:40 +0200, Angelo Dureghello wrote: > > > > > From: Angelo Dureghello > > > > >=20 > > > > > Add High Speed ad3552r platform driver. > > > > >=20 > > > > > The ad3552r DAC is controlled by a custom (fpga-based) DAC IP > > > > > through the current AXI backend, or similar alternative IIO backe= nd. > > > > >=20 > > > > > Compared to the existing driver (ad3552r.c), that is a simple SPI > > > > > driver, this driver is coupled with a DAC IIO backend that finall= y > > > > > controls the ad3552r by a fpga-based "QSPI+DDR" interface, to rea= ch > > > > > maximum transfer rate of 33MUPS using dma stream capabilities. > > > > >=20 > > > > > All commands involving QSPI bus read/write are delegated to the b= ackend > > > > > through the provided APIs for bus read/write. > > > > >=20 > > > > > Signed-off-by: Angelo Dureghello > > > > > --- > > > > > =C2=A0drivers/iio/dac/Kconfig=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2= =A0 14 ++ > > > > > =C2=A0drivers/iio/dac/Makefile=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0=C2= =A0 1 + > > > > > =C2=A0drivers/iio/dac/ad3552r-hs.c | 547 > > > > > +++++++++++++++++++++++++++++++++++++++++++ > > > > > =C2=A0drivers/iio/dac/ad3552r-hs.h |=C2=A0 18 ++ > > > > > =C2=A0drivers/iio/dac/ad3552r.h=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0 4= + > > > > > =C2=A05 files changed, 584 insertions(+) > > > > >=20 > > > > > diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig > > > > > index fa091995d002..fc11698e88f2 100644 > > > > > --- a/drivers/iio/dac/Kconfig > > > > > +++ b/drivers/iio/dac/Kconfig > > > > > @@ -6,6 +6,20 @@ > > > > > =C2=A0 > > > > > =C2=A0menu "Digital to analog converters" > > > > > =C2=A0 > > > > > +config AD3552R_HS > > > > > + tristate "Analog Devices AD3552R DAC High Speed driver" > > > > > + select ADI_AXI_DAC > > > > > + help > > > > > + =C2=A0 Say yes here to build support for Analog Devices AD3552R > > > > > + =C2=A0 Digital to Analog Converter High Speed driver. > > > > > + > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 The drive= r requires the assistance of an IP core to operate, > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 since dat= a is streamed into target device via DMA, sent over a > > > > > + =C2=A0 QSPI + DDR (Double Data Rate) bus. > > > > > + > > > > > + =C2=A0 To compile this driver as a module, choose M here: the > > > > > + =C2=A0 module will be called ad3552r-hs. > > > > > + > > > > > =C2=A0config AD3552R > > > > > =C2=A0 tristate "Analog Devices AD3552R DAC driver" > > > > > =C2=A0 depends on SPI_MASTER > > > > > diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile > > > > > index c92de0366238..d92e08ca93ca 100644 > > > > > --- a/drivers/iio/dac/Makefile > > > > > +++ b/drivers/iio/dac/Makefile > > > > > @@ -4,6 +4,7 @@ > > > > > =C2=A0# > > > > > =C2=A0 > > > > > =C2=A0# When adding new entries keep the list in alphabetical ord= er > > > > > +obj-$(CONFIG_AD3552R_HS) +=3D ad3552r-hs.o ad3552r-common.o > > > > > =C2=A0obj-$(CONFIG_AD3552R) +=3D ad3552r.o ad3552r-common.o > > > > > =C2=A0obj-$(CONFIG_AD5360) +=3D ad5360.o > > > > > =C2=A0obj-$(CONFIG_AD5380) +=3D ad5380.o > > > > > diff --git a/drivers/iio/dac/ad3552r-hs.c b/drivers/iio/dac/ad355= 2r-hs.c > > > > > new file mode 100644 > > > > > index 000000000000..27bdc35fdc29 > > > > > --- /dev/null > > > > > +++ b/drivers/iio/dac/ad3552r-hs.c > > > > > @@ -0,0 +1,547 @@ > > > > > +// SPDX-License-Identifier: GPL-2.0-only > > > > > +/* > > > > > + * Analog Devices AD3552R > > > > > + * Digital to Analog converter driver, High Speed version > > > > > + * > > > > > + * Copyright 2024 Analog Devices Inc. > > > > > + */ > > > > > + > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > + > > > > > +#include "ad3552r.h" > > > > > +#include "ad3552r-hs.h" > > > > > + > > > > > +struct ad3552r_hs_state { > > > > > + const struct ad3552r_model_data *model_data; > > > > > + struct gpio_desc *reset_gpio; > > > > > + struct device *dev; > > > > > + struct iio_backend *back; > > > > > + bool single_channel; > > > > > + struct ad3552r_ch_data ch_data[AD3552R_MAX_CH]; > > > > > + struct ad3552r_hs_platform_data *data; > > > > > +}; > > > > > + > > > > > +static int ad3552r_qspi_update_reg_bits(struct ad3552r_hs_state = *st, > > > > > + u32 reg, u32 mask, u32 val, > > > > > + size_t xfer_size) > > > > > +{ > > > > > + u32 rval; > > > > > + int ret; > > > > > + > > > > > + ret =3D st->data->bus_reg_read(st->back, reg, &rval, xfer_size)= ; > > > > > + if (ret) > > > > > + return ret; > > > > > + > > > > > + rval =3D (rval & ~mask) | val; > > > > > + > > > > > + return st->data->bus_reg_write(st->back, reg, rval, xfer_size); > > > > > +} > > > > > + > > > > > +static int ad3552r_hs_read_raw(struct iio_dev *indio_dev, > > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 struct iio_chan_spec con= st *chan, > > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int *val, int *val2, lon= g mask) > > > > > +{ > > > > > + struct ad3552r_hs_state *st =3D iio_priv(indio_dev); > > > > > + int ret; > > > > > + int ch =3D chan->channel; > > > > > + > > > > > + switch (mask) { > > > > > + case IIO_CHAN_INFO_SAMP_FREQ: { > > > > > + int sclk; > > > > > + > > > > > + ret =3D iio_backend_read_raw(st->back, chan, &sclk, 0, > > > > > + =C2=A0=C2=A0 IIO_CHAN_INFO_FREQUENCY); > > > > > + if (ret !=3D IIO_VAL_INT) > > > > > + return -EINVAL; > > > > > + > > > >=20 > > > > I just saw you had some questions on v6 that everyone failed to see= . See my > > > > reply to David here: > > > >=20 > > > > https://lore.kernel.org/linux-iio/61cf3072af74a8b2951c948ddc2383ba1= e55954d.camel@gmail.com/ > > > >=20 > > > > It should be easy and it's something that makes sense (at least to = me :)) > > > >=20 > > >=20 > > > I understood that we would improve things later in case. > > >=20 > > > Could we maybe stay with IIO_CHAN_INFO_FREQUENCY ? It doesn't seems t= o me > > > so out of scope. Sorry but i am trying to finalize someway this job, > > > so i am trying to conatain changes now at v7, if code is not really= =20 > > > totally wrong. > >=20 > > I think you're trying to rush in the series. I can understand your frus= tration > > but > > believe me that v7 (or v8) is not so bad :). > >=20 > > David already raised concerns about using IIO_CHAN_INFO_FREQUENCY. I'm = also not a > > fan > > of it and gave you another option that should be trivial and makes sens= e (given > > that > > bus_read and write are already being done through the platform_data int= erface). > > So > > no, I don't think we're going to accept "is not really totally wrong.".= IOW, We > > want > > it to be totally right - if such a thing exists :). > >=20 > > >=20 >=20 > i changed this way, using platform_data: >=20 > static int axi_dac_bus_clok(struct iio_backend *back) If we don't have error I would change it to: static void axi_dac_bus_clock(struct iio_backend *back, u64 *rate) - or at = the very least return u64 and not int. But alternatively, if you want to take simplicity one step further, you can= just save a u64 bus_clock variable in your platform_data and access it directly (give= n that we're only assuming the streaming rate in which case this is constant). And= If we ever have an usecase where we need more flexibility, it should be fairly st= aright to bring this the bus_clock() callback. I'm fine either way so up to you :) - Nuno S=C3=A1