From: "Chocron, Jonathan" <jonnyc@amazon.com>
To: "helgaas@kernel.org" <helgaas@kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
"Woodhouse, David" <dwmw@amazon.co.uk>,
"Hanoch, Uri" <hanochu@amazon.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
"Wasserstrom, Barak" <barakw@amazon.com>,
"Saidi, Ali" <alisaidi@amazon.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"andrew.murray@arm.com" <andrew.murray@arm.com>,
"Hawa, Hanna" <hhhawa@amazon.com>,
"Shenhar, Talel" <talel@amazon.com>,
"Krupnik, Ronen" <ronenk@amazon.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
benh@kernel.cras
Subject: Re: [PATCH v5 2/7] PCI: Add ACS quirk for Amazon Annapurna Labs root ports
Date: Wed, 11 Sep 2019 14:59:29 +0000 [thread overview]
Message-ID: <329373c70adfe37fc5288b9fac9e438447412693.camel@amazon.com> (raw)
In-Reply-To: <20190907165450.GL103977@google.com>
On Sat, 2019-09-07 at 11:54 -0500, Bjorn Helgaas wrote:
> On Thu, Sep 05, 2019 at 05:00:16PM +0300, Jonathan Chocron wrote:
> > From: Ali Saidi <alisaidi@amazon.com>
> >
> > The Amazon's Annapurna Labs root ports don't advertise an ACS
> > capability, but they don't allow peer-to-peer transactions and do
> > validate bus numbers through the SMMU. Additionally, it's not
> > possible
> > for one RP to pass traffic to another RP.
> >
> > Signed-off-by: Ali Saidi <alisaidi@amazon.com>
> > Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
> > Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> > Reviewed-by: Andrew Murray <andrew.murray@arm.com>
>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
>
> But please tweak it as below ...
>
Will be part of v6.
> > ---
> > drivers/pci/quirks.c | 20 ++++++++++++++++++++
> > 1 file changed, 20 insertions(+)
> >
> > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> > index ded60757a573..8fe765592943 100644
> > --- a/drivers/pci/quirks.c
> > +++ b/drivers/pci/quirks.c
> > @@ -4418,6 +4418,24 @@ static int pci_quirk_qcom_rp_acs(struct
> > pci_dev *dev, u16 acs_flags)
> > return ret;
> > }
> >
> > +static int pci_quirk_al_acs(struct pci_dev *dev, u16 acs_flags)
> > +{
> > + /*
> > + * Amazon's Annapurna Labs root ports don't include an ACS
> > capability,
> > + * but do include ACS-like functionality. The hardware doesn't
> > support
> > + * peer-to-peer transactions via the root port and each has a
> > unique
> > + * segment number.
> > + *
> > + * Additionally, the root ports cannot send traffic to each
> > other.
> > + */
> > + acs_flags &= ~(PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_SV |
> > PCI_ACS_UF);
>
> There are several quirks that use this same set of bits, but they
> don't use the same order, which is a needless difference.
>
> Can you reorder them in the bit 0 ... bit 7 order? I.e.,
>
> PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF
>
Done.
> > + if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
> > + return -ENOTTY;
>
> This could go first (above the comment) so all the acs_flags stuff is
> together.
>
Done.
> > + return acs_flags ? 0 : 1;
> > +}
> > +
> > /*
> > * Sunrise Point PCH root ports implement ACS, but unfortunately
> > as shown in
> > * the datasheet (Intel 100 Series Chipset Family PCH Datasheet,
> > Vol. 2,
> > @@ -4611,6 +4629,8 @@ static const struct pci_dev_acs_enabled {
> > { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
> > { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
> > { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
> > + /* Amazon Annapurna Labs */
> > + { PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031, pci_quirk_al_acs
> > },
> > { 0 }
> > };
> >
> > --
> > 2.17.1
> >
next prev parent reply other threads:[~2019-09-11 14:59 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-05 14:00 [PATCH v5 0/7] Amazon's Annapurna Labs DT-based PCIe host controller driver Jonathan Chocron
2019-09-05 14:00 ` [PATCH v5 1/7] PCI: Add Amazon's Annapurna Labs vendor ID Jonathan Chocron
2019-09-05 14:00 ` [PATCH v5 2/7] PCI: Add ACS quirk for Amazon Annapurna Labs root ports Jonathan Chocron
2019-09-07 16:54 ` Bjorn Helgaas
2019-09-11 14:59 ` Chocron, Jonathan [this message]
2019-09-05 14:00 ` [PATCH v5 3/7] PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port Jonathan Chocron
2019-09-05 14:22 ` Andrew Murray
2019-09-07 16:55 ` Bjorn Helgaas
2019-09-11 15:01 ` Chocron, Jonathan
2019-09-05 14:00 ` [PATCH v5 4/7] PCI: Add quirk to disable MSI-X support " Jonathan Chocron
2019-09-07 16:55 ` Bjorn Helgaas
2019-09-10 17:38 ` Lorenzo Pieralisi
2019-09-11 15:34 ` Chocron, Jonathan
2019-09-05 14:01 ` [PATCH v5 5/7] dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding Jonathan Chocron
2019-09-05 14:01 ` [PATCH v5 6/7] PCI: dwc: al: Add support for DW based driver type Jonathan Chocron
2019-09-07 16:55 ` Bjorn Helgaas
2019-09-12 12:55 ` Chocron, Jonathan
2019-09-05 14:01 ` [PATCH v5 7/7] PCI: dwc: Add validation that PCIe core is set to correct mode Jonathan Chocron
2019-09-05 14:27 ` Andrew Murray
2019-09-05 16:53 ` [PATCH v5 0/7] Amazon's Annapurna Labs DT-based PCIe host controller driver Lorenzo Pieralisi
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