From: Krzysztof Kozlowski <krzk@kernel.org>
To: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
Cc: ulf.hansson@linaro.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, andersson@kernel.org,
konradybcio@kernel.org, linux-mmc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Abel Vesa <abel.vesa@linaro.org>,
Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
Subject: Re: [PATCH v4 1/3] dt-bindings: mmc: sdhci-msm: Add ICE phandle
Date: Mon, 2 Mar 2026 09:57:03 +0100 [thread overview]
Message-ID: <32b7763b-ba44-4341-8528-be97d6607354@kernel.org> (raw)
In-Reply-To: <01085021-c116-46de-a0ce-730455620cb2@kernel.org>
On 02/03/2026 08:48, Krzysztof Kozlowski wrote:
> On 02/03/2026 08:45, Neeraj Soni wrote:
>>
>>
>> On 2/19/2026 1:57 PM, Krzysztof Kozlowski wrote:
>>> On 19/02/2026 06:38, Neeraj Soni wrote:
>>>>>>
>>>>>> + - if:
>>>>>> + required:
>>>>>> + - qcom,ice
>>>>>> + then:
>>>>>> + properties:
>>>>>> + reg-names:
>>>>>> + not:
>>>>>> + contains:
>>>>>> + const: ice
>>>>>
>>>>> And reg is still 4? This is not correct syntax. You need to define
>>>>> proper and final constraints per each device. I would write example, but
>>>>> why... more things you could just ignore.
>>>>>
>>>> I had included changes for reg in v3:
>>>> https://lore.kernel.org/all/20260206112053.3287756-2-neeraj.soni@oss.qualcomm.com/
>>>>
>>>> but those were not reviewed so i assume them to be incorrect and dropped it.
>>>> Will fix this in next patch and post.
>>>>
>>> Patch v3 was also not correct, because SDHCI v5 devices should have 1 or
>>> 2 entries, not 1-3 as previous patch said.
>>>
>> This is not clear to me. Here:
>> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml#n80
>> it says the entries should be 1-4 and there are no v5 specific constraints.
>
> There are, just scroll.
Here:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml#n212
>
>> So i made it 1-3 while adding qcom-ice constraint.
>>
>
>
> Best regards,
> Krzysztof
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-03-02 8:57 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-17 5:25 [PATCH v4 0/3] Enable Inline crypto engine for kodiak and monaco Neeraj Soni
2026-02-17 5:25 ` [PATCH v4 1/3] dt-bindings: mmc: sdhci-msm: Add ICE phandle Neeraj Soni
2026-02-17 20:16 ` Krzysztof Kozlowski
2026-02-19 5:38 ` Neeraj Soni
2026-02-19 7:20 ` Krzysztof Kozlowski
2026-02-19 8:09 ` Neeraj Soni
2026-02-19 8:27 ` Krzysztof Kozlowski
2026-03-02 7:45 ` Neeraj Soni
2026-03-02 7:48 ` Krzysztof Kozlowski
2026-03-02 8:57 ` Krzysztof Kozlowski [this message]
2026-03-02 11:25 ` Neeraj Soni
2026-03-02 16:38 ` Krzysztof Kozlowski
2026-03-04 7:28 ` Neeraj Soni
2026-02-17 5:25 ` [PATCH v4 2/3] arm64: dts: qcom: kodiak: enable the inline crypto engine for SDHC Neeraj Soni
2026-02-17 5:25 ` [PATCH v4 3/3] arm64: dts: qcom: monaco: " Neeraj Soni
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