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From: Richard Weinberger <richard@nod.at>
To: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: DTML <devicetree@vger.kernel.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	linux-mtd <linux-mtd@lists.infradead.org>,
	"Dinh Nguyen" <dinguyen@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Marek Vašut" <marek.vasut@gmail.com>,
	"Brian Norris" <computersforpeace@gmail.com>,
	"David Woodhouse" <dwmw2@infradead.org>,
	"Miquel Raynal" <miquel.raynal@bootlin.com>,
	"Boris Brezillon" <boris.brezillon@bootlin.com>
Subject: Re: [PATCH] arm: dts: socfpga: denali needs nand_x_clk too
Date: Fri, 22 Jun 2018 17:58:46 +0200	[thread overview]
Message-ID: <3320422.EJ8D6C0VHL@blindfold> (raw)
In-Reply-To: <CAK7LNASgPa4D0Siyo3mvK_AJ2zaECDXGaMEn-iNzQ9PFXFir+w@mail.gmail.com>

Masahiro,

Am Freitag, 22. Juni 2018, 16:37:21 CEST schrieb Masahiro Yamada:
> Hi Richard,
> 
> 
> 2018-06-19 21:07 GMT+09:00 Richard Weinberger <richard@nod.at>:
> > The denali NAND flash controller needs at least two clocks to operate,
> > nand_clk and nand_x_clk.
> > Since 1bb88666775e ("mtd: nand: denali: handle timing parameters by
> > setup_data_interface()") nand_x_clk is used to derive timing settings.
> >
> > Signed-off-by: Richard Weinberger <richard@nod.at>
> > ---
> > Strictly speaking denali needs a ecc_clk too, but AFAIK such a clock
> > is not present on this SoC.
> > But my SoCFPGA knowledge is very limited.
> >
> > Thanks,
> > //richard
> > ---
> >  arch/arm/boot/dts/socfpga.dtsi | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> > index 486d4e7433ed..562f7b375bbd 100644
> > --- a/arch/arm/boot/dts/socfpga.dtsi
> > +++ b/arch/arm/boot/dts/socfpga.dtsi
> > @@ -754,7 +754,8 @@
> >                         reg-names = "nand_data", "denali_reg";
> >                         interrupts = <0x0 0x90 0x4>;
> >                         dma-mask = <0xffffffff>;
> > -                       clocks = <&nand_clk>;
> > +                       clocks = <&nand_clk>, <&nand_x_clk>;
> > +                       clock-names = "nand", "nand_x";
> 
> 
> IMHO, this should be
> 
>                           clocks = <&nand_clk>, <&nand_x_clk>, <&nand_x_clk>;
>                           clock-names = "nand", "nand_x", "ecc";
> 
> 
> 
> A clock consumer (Denali in this case) should generally
> take the same number of clocks across SoCs.
> 
> It is just some SoCs tie clocks together.
> 
> It is the case for my UniPhier platform;
> "nand_x" and "ecc" are tied up because they are both 200MHz.
> 
> 
> SOCFPGA supports HW ECC correction, thus it surely needs ecc clock.

Good point!

Thanks,
//richard

  reply	other threads:[~2018-06-22 15:58 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-19 12:07 [PATCH] arm: dts: socfpga: denali needs nand_x_clk too Richard Weinberger
2018-06-20  4:52 ` Marek Vasut
2018-06-20  5:27   ` Richard Weinberger
2018-06-21  4:41     ` Marek Vasut
2018-06-22 14:37 ` Masahiro Yamada
2018-06-22 15:58   ` Richard Weinberger [this message]
2018-06-25 14:50     ` Dinh Nguyen
2018-06-25 14:55       ` Boris Brezillon
2018-06-26  2:38         ` Masahiro Yamada
2018-06-26 18:09           ` Miquel Raynal
2018-06-27  2:52             ` Masahiro Yamada
2018-06-27 14:55               ` Dinh Nguyen
2018-06-27 21:34                 ` Boris Brezillon
2018-07-02  1:35                 ` Masahiro Yamada
2018-07-02 13:19                   ` Dinh Nguyen

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