From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Frank Li <Frank.Li@nxp.com>,
imx@lists.linux.dev, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
open list <linux-kernel@vger.kernel.org>
Cc: coresight@lists.linaro.org
Subject: Re: [PATCH 1/1] arm64: dts: imx8mp: Add coresight trace components
Date: Tue, 4 Jul 2023 16:20:18 +0100 [thread overview]
Message-ID: <33362029-3d5b-b16a-27e7-578df34f0ede@arm.com> (raw)
In-Reply-To: <20230505195151.1874071-1-Frank.Li@nxp.com>
On 05/05/2023 20:51, Frank Li wrote:
> Add coresight trace components (ETM, ETF, ETB and Funnel).
>
> ┌───────┐ ┌───────┐ ┌───────┐
> │ CPU0 ├─►│ ETM0 ├─►│ │
> └───────┘ └───────┘ │ │
> │ │
> ┌───────┐ ┌───────┐ │ ATP │
> │ CPU1 ├─►│ ETM1 ├─►│ │
> └───────┘ └───────┘ │ │
> │ FUNNEL│
> ┌───────┐ ┌───────┐ │ │
> │ CPU2 ├─►│ ETM2 ├─►│ │
> └───────┘ └───────┘ │ │ ┌─────┐ ┌─────┐
> │ │ │ │ │ │
> ┌───────┐ ┌───────┐ │ │ │ M7 │ │ DSP │
> │ CPU3 ├─►│ ETM3 ├─►│ │ │ │ │ │
> └───────┘ └───────┘ └───┬───┘ └──┬──┘ └──┬──┘ AXI
> │ │ │ ▲
> ▼ ▼ ▼ │
> ┌───────────────────────────┐ ┌─────┐ ┌─┴──┐
> │ ATP FUNNEL ├──►│ETF ├─► │ETR │
> └───────────────────────────┘ └─────┘ └────┘
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 179 ++++++++++++++++++++++
> 1 file changed, 179 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index a19224fe1a6a..0fa74477b9e1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -304,6 +304,185 @@ soc: soc@0 {
> nvmem-cells = <&imx8mp_uid>;
> nvmem-cell-names = "soc_unique_id";
>
> + etm0: etm@28440000 {
> + compatible = "arm,coresight-etm4x", "arm,primecell";
> + reg = <0x28440000 0x10000>;
> + arm,primecell-periphid = <0xbb95d>;
Why is this needed (and for all the ETMs) ?
Suzuki
next prev parent reply other threads:[~2023-07-04 15:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 19:51 [PATCH 1/1] arm64: dts: imx8mp: Add coresight trace components Frank Li
2023-05-15 0:57 ` Shawn Guo
2023-06-09 8:20 ` Alexander Stein
2023-06-12 18:53 ` Frank Li
2023-07-04 15:20 ` Suzuki K Poulose [this message]
2023-07-05 20:40 ` Frank Li
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