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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ad88d055609sm100472066b.28.2025.05.27.04.00.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 May 2025 04:00:40 -0700 (PDT) Message-ID: <337068fa-adc2-478e-8f3f-ec93af0bb1c6@oss.qualcomm.com> Date: Tue, 27 May 2025 13:00:37 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] clk: qcom: gcc-ipq5018: fix GE PHY reset To: george.moussalem@outlook.com, Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org References: <20250525-ipq5018-ge-phy-v1-0-ddab8854e253@outlook.com> <20250525-ipq5018-ge-phy-v1-2-ddab8854e253@outlook.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250525-ipq5018-ge-phy-v1-2-ddab8854e253@outlook.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=WfoMa1hX c=1 sm=1 tr=0 ts=68359b5a cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=qC_FGOx9AAAA:8 a=UqCG9HQmAAAA:8 a=rZqdB0JiAKPJAkIg25gA:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 a=fsdK_YakeE02zTmptMdW:22 X-Proofpoint-GUID: 5hVGtJxHiDAmBvbrZtLiH6b7ohQdBM-_ X-Proofpoint-ORIG-GUID: 5hVGtJxHiDAmBvbrZtLiH6b7ohQdBM-_ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTI3MDA5MCBTYWx0ZWRfX/bzgczgQKEyM PupPmzoayqkFw3LQxK9BEg3ljku4W+qag5ZqrsBxPwb3dT7Y3YZpt7RwWGRj+M7zhWZri7h43HK s4pbszd3uEiLY1RijHvk3AdPXIbDbcS9cnQCuRniM/twjRhTeBRjyC35lPUvFaQOggY6olBx0PI x4FXUq6mnXUBptERXRIwDQxfkEKpo9OT2GY+//W7dpAK+U6Em1QQlSQm8VF+fU1GwXKRY8Zdbhl g+Dy6wGtvN9ygaucMPd+F1U7eFUw2G/VWgPZSRPLvI8vzk3nnKjlpJ729zEIfuPMo+msADcXF+5 EILSv6QuuI/FNuaXSg7OIzUowKbF+RSy4xIplR4Mg7SMVcaTg3eJsoG0sghHjFvJTuARini4VWg t3N3Qsb6+tJ0nIxBqjqYK4qT+9KXaIcksCIU99eOIDbkkO79QuDyQteWMvHLvF7Rh6PC5bZe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-27_05,2025-05-27_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 mlxlogscore=999 priorityscore=1501 mlxscore=0 bulkscore=0 adultscore=0 spamscore=0 suspectscore=0 malwarescore=0 clxscore=1015 impostorscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505160000 definitions=main-2505270090 On 5/25/25 7:56 PM, George Moussalem via B4 Relay wrote: > From: George Moussalem > > The MISC reset is supposed to trigger a resets across the MDC, DSP, and > RX & TX clocks of the IPQ5018 internal GE PHY. So let's set the bitmask > of the reset definition accordingly in the GCC as per the downstream > driver. > > Link: https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/00743c3e82fa87cba4460e7a2ba32f473a9ce932 > > Signed-off-by: George Moussalem > --- > drivers/clk/qcom/gcc-ipq5018.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/qcom/gcc-ipq5018.c b/drivers/clk/qcom/gcc-ipq5018.c > index 70f5dcb96700f55da1fb19fc893d22350a7e63bf..02d6f08f389f24eccc961b9a4271288c6b635bbc 100644 > --- a/drivers/clk/qcom/gcc-ipq5018.c > +++ b/drivers/clk/qcom/gcc-ipq5018.c > @@ -3660,7 +3660,7 @@ static const struct qcom_reset_map gcc_ipq5018_resets[] = { > [GCC_WCSS_AXI_S_ARES] = { 0x59008, 6 }, > [GCC_WCSS_Q6_BCR] = { 0x18004, 0 }, > [GCC_WCSSAON_RESET] = { 0x59010, 0}, > - [GCC_GEPHY_MISC_ARES] = { 0x56004, 0 }, > + [GCC_GEPHY_MISC_ARES] = { 0x56004, .bitmask = 0xf }, The computer tells me there aren't any bits beyond this mask.. Does this actually fix anything? Konrad