From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen Yu Subject: Re: [PATCH v1 01/12] dt-bindings: usb: add support for dwc3 controller on HiSilicon SoCs Date: Mon, 3 Dec 2018 16:51:09 +0800 Message-ID: <33cda716-d09c-28e7-d4b4-26f246786f5e@huawei.com> References: <20181203034515.91412-1-chenyu56@huawei.com> <20181203034515.91412-2-chenyu56@huawei.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Sergei Shtylyov , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: wangbinghui@hisilicon.com, suzhuangluan@hisilicon.com, kongfei@hisilicon.com, Greg Kroah-Hartman , Rob Herring , Mark Rutland , John Stultz List-Id: devicetree@vger.kernel.org Hi, On 2018/12/3 16:35, Sergei Shtylyov wrote: > Hello! > > On 03.12.2018 6:45, Yu Chen wrote: > >> This patch adds binding descriptions to support the dwc3 controller >> on HiSilicon SoCs and boards like the HiKey960. >> >> Cc: Greg Kroah-Hartman >> Cc: Rob Herring >> Cc: Mark Rutland >> Cc: John Stultz >> Signed-off-by: Yu Chen >> --- >>   .../devicetree/bindings/usb/dwc3-hisi.txt          | 67 ++++++++++++++++++++++ >>   1 file changed, 67 insertions(+) >>   create mode 100644 Documentation/devicetree/bindings/usb/dwc3-hisi.txt >> >> diff --git a/Documentation/devicetree/bindings/usb/dwc3-hisi.txt b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt >> new file mode 100644 >> index 000000000000..d32d2299a0a1 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt >> @@ -0,0 +1,67 @@ >> +HiSilicon DWC3 USB SoC controller >> + >> +This file documents the parameters for the dwc3-hisi driver. >> + >> +Required properties: >> +- compatible:    should be "hisilicon,hi3660-dwc3" >> +- clocks:    A list of phandle + clock-specifier pairs for the >> +        clocks listed in clock-names >> +- clock-names:    Specify clock names >> +- resets:    list of phandle and reset specifier pairs. >> + >> +Sub-nodes: >> +The dwc3 core should be added as subnode to HiSilicon DWC3 as shown in the >> +example below. The DT binding details of dwc3 can be found in: >> +Documentation/devicetree/bindings/usb/dwc3.txt >> + >> +Example: >> +    usb3: hisi_dwc3 { >> +        compatible = "hisilicon,hi3660-dwc3"; >> +        #address-cells = <2>; >> +        #size-cells = <2>; >> +        ranges; >> + >> +        clocks = <&crg_ctrl HI3660_CLK_ABB_USB>, >> +             <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; >> +        clock-names = "clk_usb3phy_ref", "aclk_usb3otg"; >> +        assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; >> +        assigned-clock-rates = <229000000>; >> +        resets = <&crg_rst 0x90 8>, >> +             <&crg_rst 0x90 7>, >> +             <&crg_rst 0x90 6>, >> +             <&crg_rst 0x90 5>; >> + >> +        dwc3: dwc3@ff100000 { > >     According to the DT spec, the node names should be generic, not chip specific, i.e. usb@ff100000 in this case. > Do you mean it should be usb@ff100000: dwc3@ff100000 ? Thanks! > [...] > > MBR, Sergei > > . >