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From: Arnd Bergmann <arnd@arndb.de>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Kevin Cernekee <cernekee@gmail.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Jason Cooper <jason@lakedaemon.net>,
	Ralf Baechle <ralf@linux-mips.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Maxime Bizon <mbizon@freebox.fr>, Jonas Gorski <jogo@openwrt.org>,
	Linux MIPS Mailing List <linux-mips@linux-mips.org>
Subject: Re: [PATCH 01/11] irqchip: Allow irq_reg_{readl,writel} to use __raw_{readl_writel}
Date: Wed, 29 Oct 2014 22:41:03 +0100	[thread overview]
Message-ID: <3403771.J3X9ZBogqZ@wuerfel> (raw)
In-Reply-To: <alpine.DEB.2.11.1410292226050.5308@nanos>

On Wednesday 29 October 2014 22:31:06 Thomas Gleixner wrote:
> On Wed, 29 Oct 2014, Arnd Bergmann wrote:
> > On Wednesday 29 October 2014 13:09:47 Kevin Cernekee wrote:
> > > generic-chip.c already has a fair amount of indirection, with pointers
> > > to saved masks, user-specified register offsets, and such.  Is there a
> > > concern that introducing, say, a pair of readl/writel function
> > > pointers, would cause an unacceptable performance drop?
> > 
> > I don't know. Thomas' reply suggests that it isn't. Doing byteswap
> > in software at a register access is usually free in terms of CPU
> > cycles, but an indirect function call can be noticeable if we do
> > that a lot.
> 
> I did not say that it is free. I merily said that I prefer to have
> this solved at the core level rather than at the driver level.

Yes, I understood that.

> So you have several options to do so:
> 
> 1) Indirections
> 
> 2) Different functions for the different access modes
> 
> 3) Alternatives
> 
> #1 Is the simplest solution, but imposes the overhead of an indirect
>    function call for something trivial
> 
> #2 The most efficient and flexible way if you have to provide
>    different access modes for different drivers. But it comes with the
>    price of increasing the text foot print.
> 
> #3 Smart and efficient, but requires that on a particular system all
>    drivers use the same access mode.

Right. The option that I was explaining earlier basically combines #1 and
#3: For all kernels on which we know the endianess of all generic-irqchip
users at compile time, we hardcode that, and we use indirections of
some sort for the cases where we build a kernel that needs both.

	Arnd

  reply	other threads:[~2014-10-29 21:41 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-29  3:58 [PATCH 01/11] irqchip: Allow irq_reg_{readl,writel} to use __raw_{readl_writel} Kevin Cernekee
2014-10-29  3:58 ` [PATCH 02/11] irqchip: brcmstb-l2: Eliminate dependency on ARM code Kevin Cernekee
     [not found]   ` <1414555138-6500-2-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-10-29  7:29     ` Arnd Bergmann
2014-10-29 16:53   ` Florian Fainelli
2014-10-29  3:58 ` [PATCH 03/11] irqchip: bcm7120-l2: Eliminate bad IRQ check Kevin Cernekee
2014-10-29 16:53   ` Florian Fainelli
2014-10-29  3:58 ` [PATCH 04/11] irqchip: Remove ARM dependency for bcm7120-l2 and brcmstb-l2 Kevin Cernekee
2014-10-29  7:44   ` Arnd Bergmann
2014-10-29 16:53   ` Florian Fainelli
2014-10-29  3:58 ` [PATCH 05/11] irqchip: bcm7120-l2: Make sure all register accesses use base+offset Kevin Cernekee
2014-10-29  7:46   ` Arnd Bergmann
2014-10-29  7:56     ` Arnd Bergmann
2014-10-29 16:53   ` Florian Fainelli
2014-10-29  3:58 ` [PATCH 06/11] irqchip: bcm7120-l2: Use irq_reg_* accessors Kevin Cernekee
2014-10-29  7:46   ` Arnd Bergmann
2014-10-29 16:54   ` Florian Fainelli
2014-10-29  3:58 ` [PATCH 07/11] irqchip: brcmstb-l2: " Kevin Cernekee
     [not found]   ` <1414555138-6500-7-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-10-29  7:46     ` Arnd Bergmann
2014-10-29 16:54   ` Florian Fainelli
2014-10-29  3:58 ` [PATCH 08/11] irqchip: bcm7120-l2: Fix missing nibble in gc->unused mask Kevin Cernekee
2014-10-29  7:47   ` Arnd Bergmann
2014-10-29 16:55   ` Florian Fainelli
2014-10-29  3:58 ` [PATCH 09/11] irqchip: bcm7120-l2: Use gc->mask_cache to simplify suspend/resume functions Kevin Cernekee
     [not found]   ` <1414555138-6500-9-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-10-29 16:55     ` Florian Fainelli
2014-10-29  3:58 ` [PATCH 10/11] irqchip: bcm7120-l2: Extend driver to support 64+ bit controllers Kevin Cernekee
2014-10-29  7:53   ` Arnd Bergmann
2014-10-29 23:22     ` Kevin Cernekee
2014-10-30  9:10       ` Arnd Bergmann
2014-10-29  3:58 ` [PATCH 11/11] irqchip: Decouple bcm7120-l2 from brcmstb-l2 Kevin Cernekee
2014-10-29  7:55   ` Arnd Bergmann
2014-10-29 16:56   ` Florian Fainelli
2014-10-29  7:43 ` [PATCH 01/11] irqchip: Allow irq_reg_{readl,writel} to use __raw_{readl_writel} Arnd Bergmann
2014-10-29 17:36   ` Florian Fainelli
     [not found]     ` <54512599.4080500-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-10-29 19:14       ` Arnd Bergmann
2014-10-29 18:48   ` Kevin Cernekee
2014-10-29 19:10     ` Thomas Gleixner
2014-10-29 19:14     ` Arnd Bergmann
2014-10-29 20:09       ` Kevin Cernekee
2014-10-29 21:13         ` Arnd Bergmann
2014-10-29 21:31           ` Thomas Gleixner
2014-10-29 21:41             ` Arnd Bergmann [this message]
2014-10-29 21:50               ` Thomas Gleixner
2014-10-29 23:05           ` Kevin Cernekee
2014-10-30  9:58             ` Arnd Bergmann
2014-10-30 19:03               ` Kevin Cernekee
2014-10-30 19:52                 ` Arnd Bergmann
2014-10-30 20:54                   ` Kevin Cernekee
     [not found]                     ` <CAJiQ=7C+r80Jt51NXLCk-0D2nRezBfMN9pGBVT9V8ncefGhBnQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-10-30 21:18                       ` Arnd Bergmann
2014-10-29 10:12 ` Thomas Gleixner

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