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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>,
	imx@lists.linux.dev, Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>
Cc: dri-devel@lists.freedesktop.org, Frank Li <frank.li@nxp.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 06/10] dt-bindings: display: imx: Add bindings for i.MX94 DCIF
Date: Wed, 16 Jul 2025 21:40:56 +0200	[thread overview]
Message-ID: <35207b9f-fe61-4e6f-8eb8-26a6d1477596@kernel.org> (raw)
In-Reply-To: <20250716081519.3400158-7-laurentiu.palcu@oss.nxp.com>

On 16/07/2025 10:15, Laurentiu Palcu wrote:
> DCIF is the i.MX94 Display Controller Interface which is used to
> drive a TFT LCD panel or connects to a display interface depending
> on the chip configuration.
> 
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>


...

> +
> +  interrupts:
> +    items:
> +      - description:
> +          Interrupt output for CPU domain 0 (controlled by common registers group).
> +      - description:
> +          Interrupt output for CPU domain 1 (controlled by background layer registers group).
> +      - description:
> +          Interrupt output for CPU domain 2 (controlled by foreground layer registers group).


Keep these in one line with description, by dropping redundant part
"Interrupt output for".

> +
> +  interrupt-names:
> +    items:
> +      - const: common
> +      - const: bg_layer
> +      - const: fg_layer
> +
> +  clocks:
> +    items:
> +      - description: APB bus clock
> +      - description: AXI bus clock
> +      - description: Pixel clock
> +
> +  clock-names:
> +    items:
> +      - const: apb
> +      - const: axi
> +      - const: pix
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  nxp,blk-ctrl:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: A phandle which points to NXP displaymix blk-ctrl.


Describe for what purpose (from hardware point of view)

With these improvements:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

> +
> +  port:
> +    $ref: /schemas/graph.yaml#/properties/port
> +    description: Display Pixel Interface(DPI) output port
> +


Best regards,
Krzysztof

  parent reply	other threads:[~2025-07-16 19:41 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-16  8:15 [PATCH v2 00/10] Add support for i.MX94 DCIF Laurentiu Palcu
2025-07-16  8:15 ` [PATCH v2 03/10] dt-bindings: display: fsl,ldb: Add i.MX94 LDB Laurentiu Palcu
2025-07-16 18:29   ` Frank Li
2025-07-17  6:06   ` Krzysztof Kozlowski
2025-07-16  8:15 ` [PATCH v2 06/10] dt-bindings: display: imx: Add bindings for i.MX94 DCIF Laurentiu Palcu
2025-07-16 18:40   ` Frank Li
2025-07-16 19:40   ` Krzysztof Kozlowski [this message]
2025-07-16  8:15 ` [PATCH v2 08/10] arm64: dts: imx943: Add display pipeline nodes Laurentiu Palcu
2025-07-16 19:02   ` Frank Li
2025-07-16  8:15 ` [PATCH v2 09/10] arm64: dts: imx943-evk: Add display support using IT6263 Laurentiu Palcu
2025-07-16 19:10   ` Frank Li

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